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RS8235/8251EVM View Datasheet(PDF) - Conexant Systems

Part NameDescriptionManufacturer
RS8235/8251EVM Endstation ServiceSAR Controller Conexant
Conexant Systems Conexant
RS8235/8251EVM Datasheet PDF : 6 Pages
1 2 3 4 5 6
network access products
Endstation
ServiceSAR Controller
RS8235
Endstation Architecture
The RS8235’s architecture is designed to minimize and
control host traffic congestion. The host manages the
RS8235 terminal using write-only control and status
queues. The host submits data for transmit by writing
buffer descriptor pointers to one of four transmit queues.
These entries may be thought of as task lists for the
Endstation SAR to perform. In addition, the RS8235 can
perform ATM server functions for up to four clients. The
device’s architecture lessens the control burden on the
host system while minimizing PCI bus utilization, by
eliminating reads across the PCI bus from host control
activities. It also provides control points to manage
congestion, which is critical for ABR.
The RS8235 System
The RS8235 consists of five separate coprocessors
(incoming and outgoing DMA, segmentation, reassembly
and xBR traffic manager), each of which maintains state
information in shared, off-chip memory. This memory is
controlled by the SAR through the local bus interface,
which arbitrates access to the bus between the various
coprocessors. These coprocessors, though they run off
the same system clock, operate asynchronously from
each other. Communication between the coprocessors
takes place through on-chip FIFOs or through queues
in local memory.
The RS8235’s on-chip coprocessor blocks are surrounded
by high-performance PCI and UTOPIA ports for glueless
interface to a variety of system components with full
line-rate throughput and low bus occupancy. Figure 1
illustrates these functional blocks.
xBR Cell Scheduler
The cell scheduler rate-shapes all segmentation traffic
according to per-channel parameters. The RS8235
supports eight user-assigned scheduling priorities in
addition to CBR. The user assigns a priority to each
channel and sets the range of available transmission
rates for the scheduler by setting the size of the
dynamic schedule table and the duration of each
scheduling slot in the table. The user can further
control consumption of bandwidth by assigning peak
cell-rate limits to four of those scheduling priorities.
ABR Traffic Management
The ABR flow control manager dynamically
rate-shapes ABR traffic independently per VCC, based
upon network feedback. One or more ABR templates
are used to govern the behavior of traffic. Both relative
rate (RR) and explicit rate (ER) algorithms are
employed when computing a rate adjustment on
an ABR VCC. Programmable ABR templates allow
rate-shaping policies on groups of VCCs to be tuned
for different network applications. The RS8235
automatically generates and processes all resource
management (RM) cells. The on-chip hardware, coupled
with the user-defined ABR templates, implements all
required source and destination behaviors as defined in
TM4.0. Optional behaviors such as use-it-or-lose-it,
out-of-rate RM cells, host congestion and allowed cell
rate (ACR) monitoring are also supported.
IP Interworking
The VBR-3, CLP0+1 category includes rate-shaping via
the dual leaky bucket GCRA algorithm based on the CLP
bit, which is recommended by the IETF for use with IP.
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