74LVX3245QSCX(1999) View Datasheet(PDF) - Fairchild Semiconductor

Part Name

Description

Manufacturer

74LVX3245QSCX
(Rev.:1999)

8-Bit Dual Supply Translating Transceiver with 3-STATE Outputs

Fairchild Semiconductor 

Capacitance

Symbol

Parameter

Typ

CIN

Input Capacitance

CI/O

Input/Output

Capacitance

CPD

Power Dissipation

Capacitance (Note 9)

Note 9: CPD is measured at 10 MHz

4.5

15

A→B

55

B→A

40

8-Bit Dual Supply Translating Transceiver

The LVX3245 is a dual supply device capable of bidirec-

tional signal translation. This level shifting ability provides

an efficient interface between low voltage CPU local bus

with memory and a standard bus defined by 5V I/O levels.

The device control inputs can be controlled by either the

low voltage CPU and core logic or a bus arbitrator with 5V

I/O levels.

Manufactured on a sub-micron CMOS process, the

LVX3245 is ideal for mixed voltage applications such as

notebook computers using 3.3V CPU’s and 5V peripheral

devices.

Units

pF

pF

pF

Conditions

VCC = Open

VCCA = 3.3V

VCCB = 5.0V

VCCB = 5.0V

VCCA = 3.3V

Power Up Considerations

To insure that the system does not experience unneces-

sary ICC current draw, bus contention, or oscillations during

power up, the following guidelines should be adhered to

(refer to Table 1):

• Power up the control side of the device first. This is the

VCCA.

• OE should ramp with or ahead of VCCA. This will help

guard against bus contention.

• The Transmit/Receive control pin (T/R) should ramp with

VCCA, this will ensure that the A Port data pins are con-

figured as inputs. With VCCA receiving power first, the A

I/O Port should be configured as inputs to help guard

against bus contention and oscillations.

• A side data inputs should be driven to a valid logic level.

This will prevent excessive current draw.

The above steps will ensure that no bus contention or oscil-

lations, and therefore no excessive current draw occurs

during the power up cycling of these devices. These steps

will help prevent possible damage to the translator devices

and potential damage to other system components.

TABLE 1. Low Voltage Translator Power Up Sequencing Table

Device Type

VCCA

VCCB

T/R

OE

A Side I/O

B Side I/O

Floatable Pin

Allowed

3V

5V

ramp

ramp

logic

74LVX3245

outputs

No

(power up 1st) configurable

with VCCA

with VCCA

0V or VCCA

Please reference Application Note AN-5001 for more detailed information on using Fairchild’s LVX Low Voltage Dual

Supply CMOS Translating Transceivers.

5

www.fairchildsemi.com

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