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74AHC123ABQ View Datasheet(PDF) - NXP Semiconductors.

Part Name
Description
Manufacturer
74AHC123ABQ Datasheet PDF : 21 Pages
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74AHC123A; 74AHCT123A
Dual retriggerable monostable multivibrator with reset
Rev. 02 — 18 January 2008
Product data sheet
1. General description
The 74AHC123A; 74AHCT123A are high-speed Si-gate CMOS devices and are pin
compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with
JEDEC standard no. 7A.
The 74AHC123A; 74AHCT123A are dual retriggerable monostable multivibrators with
output pulse width control by three methods. The basic pulse time is programmed by
selection of an external resistor (REXT) and capacitor (CEXT). The external resistor and
capacitor are normally connected as shown in Figure 11.
Once triggered, the basic output pulse width may be extended by retriggering the gated
active LOW-going edge input (nA) or the active HIGH-going edge input (nB). By repeating
this process, the output pulse period (nQ = HIGH, nQ = LOW) can be made as long as
desired. Alternatively an output delay can be terminated at any time by a LOW-going edge
on input nRD, which also inhibits the triggering.
An internal connection from nRD to the input gate makes it possible to trigger the circuit by
a positive-going signal at input nRD as shown in Table 3. Figure 8 and Figure 9 illustrate
pulse control by retriggering and early reset. The basic output pulse width is essentially
determined by the value of the external timing components REXT and CEXT. When
CEXT 10 nF, the typical output pulse width is defined as: tW = REXT × CEXT where
tW = pulse width in ns; REXT = external resistor in k; CEXT = external capacitor in pF.
Schmitt-trigger action at all inputs makes the circuit highly tolerant to slower input rise and
fall times. The 74AHC123A; 74AHCT123A is identical to the 74AHC423; 74AHCT423 but
can be triggered via the reset input.
2. Features
s All inputs have a Schmitt-trigger action
s Inputs accept voltages higher than VCC
s DC triggered from active HIGH or active LOW inputs
s Retriggerable for very long pulses up to 100 % duty factor
s Direct reset terminates output pulse
s For 74AHC123A only: operates with CMOS input levels
s For 74AHCT123A only: operates with TTL input levels
s ESD protection:
x HBM JESD22-A114E exceeds 2000 V
x MM JESD22-A115-A exceeds 200 V
x CDM JESD22-C101C exceeds 1000 V
s Multiple package options
s Specified from 40 °C to +85 °C and from 40 °C to +125 °C
 

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