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LA9702W View Datasheet(PDF) - SANYO -> Panasonic

Part NameDescriptionManufacturer
LA9702W DVD Player Front End Processor SANYO
SANYO -> Panasonic SANYO
LA9702W Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
LA9702W
Functional Description
1. RF amplifier
• DVD mode
The RF signal input as a differential signal to pins 1 and 2 is passed through the RF VCA and is output from pin 65.
The signal output from pin 65 is passed through a DVD RF equalizer and is output to later stage ICs from pins 40 and
41. When pin 63 is high, the RF signal does not pass through the customer amplifier. As a result, it is not influenced by
the external peripheral circuit connected to pins 78 through 80. The RF VCA gain is controlled by applying a DC
voltage to pin 21. This IC provides two RF equalizer systems, and when pin 61 is high the pin 77 equalizer output is
selected, and when low, the pin 52 equalizer output is selected. The amount of boost provided by the RF equalizer can
be modified with the pin 22 DC voltage.
• CD mode
Pins 8, 9, and 10 can be set to be the RF input pins by setting pin 76 low. The customer amplifier connected to pins 78
through 80 is enabled by setting pin 63 low, a CD equalizer circuit can be constructed on pins 78 through 80, and the
signal will not pass through the DVD RF equalizer. The RF VCA gain is controlled by applying a DC voltage to pin
21.
2. Peak hold/bottom hold
The envelope waveforms for the peak and bottom of the front end RF signal output from pins 40 and 41 are output
from pins 42 and 43. The envelope detection constants are set by the values of the resistors inserted between pins 43
and 39 and ground. The bottom hold detection constant can be increased by about a factor of 4 by setting pin 59 low.
The bottom hold band width is also be increased by about a factor of 2 by setting pin 57 low.
3. Defect detection
The RF signal input from the pickup is converted to binary by a limiter circuit. The binary signal time is observed with
a monostable multivibrator, and if there is no change in binary signal for over a certain fixed period, pin 46 is set high.
The time period of the monostable multivibrator is set by the value of the capacitor connected to pin 47 and the resistor
connected to pin 48.
4. RF equalizer
The CD RF equalizer is constructed from external components and the customer amplifier on pins 78 and 80, and
outputs to the RF VCA in the next stage.
This IC provides two DVD RF equalizer systems, one of which is formed from external components and pins 67, 69,
71, 73, 75, and 77, and the other system is formed from external components and pins 52, 54, 56, 58, 60, and 62. When
pin 61 is high, the equalizer system on pins 67, 69, 71, 73, 75, and 77 is selected, and when that pin is low, the
equalizer system on pins 52, 54, 56, 58, 60, and 62 is selected. Since the customer amplifier is excluded from the
signal path when pin 63 is high, the CD equalizer does not influence IC operation in DVD mode.
5. BCA
Peak envelope detection is applied to the previous stage RF signal output from pins 40 and 41. The result is converted
to binary by comparison with the BCA threshold and output from pin 45. The BCA threshold is input from external
circuits to pin 25.
6. Reflect amplifier
The signals input to pins 3, 4, 5, and 6 or pins 7, 8, and 9 are added with an summing amplifier. The pit component is
removed from the input signal with a low-pass filter. The summed signal is passed through a VCA that adjusts the
servo gain and output from pin 28. The VCA that adjusts the servo gain is controlled by the DC voltage applied to pin
18.
Note that when the pin 76 input is high, pins 3, 4, 5, and 6 are selected, and when low, pins 7, 8, and 9 are selected.
No. 6575 -4/10
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