X9221 View Datasheet(PDF) - Xicor -> Intersil

Part Name

Description

Manufacturer

X9221

Dual E2POT™ Nonvolatile Digital Potentiometer

Xicor -> Intersil 

X9221

Acknowledge

Acknowledge is a software convention used to provide

a positive handshake between the master and slave

devices on the bus to indicate the successful receipt of

data. The transmitting device, either the master or the

slave, will release the SDA bus after transmitting eight

bits. The master generates a ninth clock cycle and

during this period the receiver pulls the SDA line LOW to

acknowledge that it successfully received the eight bits

of data. See Figure 7.

The X9221 will respond with an acknowledge after

recognition of a start condition and its slave address and

once again after successful receipt of the command

byte. If the command is followed by a data byte the

X9221 will respond with a final acknowledge.

Array Description

The X9221 is comprised of two resistor arrays. Each

array contains 63 discrete resistive segments that are

connected in series. The physical ends of each array are

equivalent to the fixed terminals of a mechanical poten-

tiometer (VH and VL inputs).

At both ends of each array and between each resistor

segment is a FET switch connected to the wiper (VW)

output. Within each individual array only one switch may

be turned on at a time. These switches are controlled by

the Wiper Counter Register (WCR). The six least signifi-

cant bits of the WCR are decoded to select, and enable,

one of sixty-four switches.

The WCR may be written directly, or it can be changed

by transferring the contents of one of four associated

data registers into the WCR. These data registers and

the WCR can be read and written by the host system.

Device Addressing

Following a start condition the master must output the

address of the slave it is accessing. The most significant

four bits of the slave address are the device type

identifier (refer to Figure 1 below). For the X9221 this is

fixed as 0101[B].

Figure 1. Slave Address

DEVICE TYPE

IDENTIFIER

0 1 0 1 A3 A2 A1 A0

DEVICE ADDRESS

3079 ILL F08

The next four bits of the slave address are the device

address. The physical device address is defined by the

state of the A0-A3 inputs. The X9221 compares the

serial data stream with the address input state; a suc-

cessful compare of all four address bits is required for

the X9221 to respond with an acknowledge.

Acknowledge Polling

The disabling of the inputs, during the internal non-

volatile write operation, can be used to take advantage

of the typical 5ms E2PROM write cycle time. Once the

stop condition is issued to indicate the end of the

nonvolatile write command the X9221 initiates the inter-

nal write cycle. ACK polling can be initiated immediately.

This involves issuing the start condition followed by the

device slave address. If the X9221 is still busy with the

write operation no ACK will be returned. If the X9221 has

completed the write operation an ACK will be returned

and the master can then proceed with the next

operation.

Flow 1. ACK Polling Sequence

NONVOLATILE WRITE

COMMAND COMPLETED

ENTER ACK POLLING

ISSUE

START

ISSUE SLAVE

ADDRESS

ACK

NO

RETURNED?

YES

FURTHER

NO

OPERATION?

YES

ISSUE

INSTRUCTION

ISSUE STOP

ISSUE STOP

PROCEED

PROCEED

3079 ILL F18

3

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