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74LV4052 查看數據表(PDF) - Philips Electronics

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74LV4052 Dual 4-channel analog multiplexer/demultiplexer Philips
Philips Electronics Philips
74LV4052 Datasheet PDF : 16 Pages
First Prev 11 12 13 14 15 16
Philips Semiconductors
Dual 4-channel analog multiplexer/demultiplexer
Product specification
74LV4052
WAVEFORMS
NOTES:
1. VM = 1.5 V at 2.7 V VCC 3.6 V
VM = 0.5 × VCC at 2.7 V > VCC > 3.6 V
2. VOL and VOH are the typical output voltage drop that occur with
the output load
3. Vx = VOL + 0.3 V at 2.7 V VCC 3.6 V
VX = VOL + 0.1 × VCC at 2.7 V >VCC > 3.6 V
VY = VOH – 0.3 V at 2.7 V VCC 3.6 V
VY = VOH – 0.1 × VCC at 2.7 V >VCC > 3.6 V
VI
INPUTS
GND
tPLH
V OH
OUTPUTS
VM
VM
tPHL
V OL
SV01638
Figure 13. Input (Vis) to output (Vos) propagation delays.
TEST CIRCUIT
VI
INPUTS
VM
GND
VCC
OUTPUT
LOW-to-OFF
OFF-to-LOW
VOL
tPLZ
VX
tPHZ
tPZL
VM
tPZH
VOH
OUTPUT
HIGH-to-OFF
OFF-to-HIGH
GND
outputs
enabled
VY
outputs
disabled
VM
outputs
enabled
SV01640
Figure 14. Turn-on and turn-off times
for the inputs (Sn, E) to the output (Vos).
Vcc
PULSE
GENERATOR
Vl
RT
D.U.T.
VO
CL
Test Circuit for Outputs
S1
2  VCC
Open
VEE
1kW
90%
NEGATIVE
PULSE
50 pF
1kW
VEE
POSITIVE
PULSE
10%
tW
VM
10%
tTHL (tf)
tTLH (tr)
90%
VM
tW
VM
10%
90%
VM
90%
VI
0V
tTLH (tr)
tTHL (tf)
VI
10%
0V
VCC
< 2.7V
2.7 - 3.6V
> 3.6 V
VI
VCC
2.7V
VCC
Test
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
S1
Open
2  VCC
VEE
VIS
Pulse
VEE
VI
DEFINITIONS
RL = Load resistor
CL = Load capacitance includes jig and probe capacitance
RT = Termination resistance should be equal to ZOUT of
pulse generators.
tr = tf =6ns, when measuring fmax, there is no constraint on
tr, tf with 50% duty factor.
Figure 15. Load circuitry for switching times.
SY01738
1998 Jun 23
11
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