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X1205V8 View Datasheet(PDF) - Intersil

Part NameDescriptionManufacturer
X1205V8 2-Wire™ RTC Real Time Clock/Calendar Intersil
Intersil Intersil
X1205V8 Datasheet PDF : 22 Pages
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X1205
AC Specifications (TA = -40°C to +85°C, VCC = +2.7V to +5.5V, unless otherwise specified.)
Symbol
Parameter
Min.
fSCL
tIN
tAA
tBUF
tLOW
tHIGH
tSU:STA
tHD:STA
tSU:DAT
tHD:DAT
tSU:STO
tDH
tR
tF
Cb
SCL Clock Frequency
Pulse width Suppression Time at inputs
SCL LOW to SDA Data Out Valid
Time the bus must be free before a new transmission can start
Clock LOW Time
Clock HIGH Time
Start Condition Setup Time
Start Condition Hold Time
Data In Setup Time
Data In Hold Time
Stop Condition Setup Time
Data Output Hold Time
SDA and SCL Rise Time
SDA and SCL Fall Time
Capacitive load for each bus line
50(1)
1.3
1.3
0.6
0.6
0.6
100
0
0.6
50
20 +.1Cb(1)(2)
20 +.1Cb(1)(2)
Notes: (1) This parameter is not 100% tested.
(2) Cb = total capacitance of one bus line in pF.
Max.
400
0.9
300
300
400
Units
kHz
ns
µs
µs
µs
µs
µs
µs
ns
µs
µs
ns
ns
ns
pF
TIMING DIAGRAMS
Bus Timing
SCL
tSU:STA
SDA IN
SDA OUT
tF
tHIGH
tSU:DAT
tHD:STA
tLOW
tHD:DAT
tR
tAA tDH
tSU:STO
tBUF
5
FN8097.2
September 23, 2005
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