W39V040FB View Datasheet(PDF) - Winbond

Part Name

Description

Manufacturer

W39V040FB

512K × 8 CMOS FLASH MEMORY WITH FWH INTERFACE

Winbond 

W39V040FB

DQ7: #Data Polling

The #Data Polling bit, DQ7, indicates whether an Embedded Program or Erase algorithm is in

progress or completed. Data Polling is valid after the rising edge of the final #WE pulse in the

command sequence.

During the Embedded Program algorithm, the device outputs on DQ7 and the complement of the data

programmed to DQ7. Once the Embedded Program algorithm has completed, the device outputs the

data programmed to DQ7. The system must provide the program address to read valid status

information on DQ7. If a program address falls within a protected sector, #Data Polling on DQ7 is

active for about 1μS, and then the device returns to the read mode.

During the Embedded Erase algorithm, #Data Polling produces “0” on DQ7. Once the Embedded

Erase algorithm has completed, #Data Polling produces “1” on DQ7. An address within any of the

sectors selected for erasure must be provided to read valid status information on DQ7.

Just before the completion of an Embedded Program or Erase operation, DQ7 may change

asynchronously with DQ0-DQ6 while Output Enable (#OE) is set to low. That is, the device may

change from providing status information to valid data on DQ7. Depending on when it samples the

DQ7 output, the system may read the status or valid data. Even if the device has completed the

program or erase operation and DQ7 has valid data, the data outputs on DQ0-DQ6 may be still

invalid. Valid data on DQ7-DQ0 will appear on successive read cycles.

RY/#BY: Ready/#Busy

The RY/#BY is a dedicated, open-drain output pin which indicates whether an Embedded Algorithm is in

progress or complete. The RY/#BY status is valid after the rising edge of the final #WE pulse in the

command sequence. Since RY/#BY is an open-drain output, several RY/#BY pins can be tied together in

parallel with a pull-up resistor to VDD.

When the output is low (Busy), the device is actively erasing or programming. When the output is high

(Ready), the device is in the read mode or standby mode.

DQ6: Toggle Bit

Toggle Bit on DQ6 indicates whether an Embedded Program or Erase algorithm is in progress or

complete. Toggle Bit I may be read at any address, and is valid after the rising edge of the final #WE

pulse in the command sequence (before the program or erase operation), and during the sector erase

time-out.

During an Embedded Program or Erase algorithm operation, successive read cycles to any address

cause DQ6 to toggle. The system may use either #OE or #CE to control the read cycles. Once the

operation has completed, DQ6 stops toggling.

The system can use DQ6 to determine whether a sector is actively erasing. If the device is actively

erasing (i.e., the Embedded Erase algorithm is in progress), DQ6 toggles. If a program address falls

within a protected sector, DQ6 toggles for about 1 μs after the program command sequence is written,

and then returns to reading array data.

DQ5: Exceeded Timing Limits

DQ5 indicates whether the program or erase time has exceeded a specified internal pulse count limit.

DQ5 produces “1” under these conditions which indicates that the program or erase cycle was not

successfully completed.

Publication Release Date: December 12, 2005

-7-

Revision A4

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