W39V040CP View Datasheet(PDF) - Winbond

Part Name

Description

Manufacturer

W39V040CP

512K X 8 CMOS FLASH MEMORY WITH LPC INTERFACE

Winbond 

13. TIMING WAVEFORMS FOR LPC INTERFACE MODE

13.1 Read Cycle Timing Diagram

W39V040C

CLK

#RESET

#LFRAM

LAD[3:0]

TCYC

Start

Memory

Read

Cycle

Address

0000b 010Xb A[31:28] A[27:24] A[23:20] A[19:16] A[15:12] A[11:8]

A[7:4]

1 Clock 1 Clock

Load Address in 8 Clocks

TKQ

TSU THD

TAR

Sync

Data

A[3:0] 1111b Tri-State 0000b D[3:0] D[7:4]

2 Clocks

1 Clock Data out 2 Clocks

TAR

Next Start

0000b

1 Clock

13.2 Write Cycle Timing Diagram

CLK

#RESET

#LFRAM

LAD[3:0]

TCYC

Memory

Write

Start Cycle

Address

0000b 011Xb A[31:28] A[27:24] A[23:20] A[19:16] A[15:12] A[11:8]

A[7:4]

A[3:0]

TSU THD

Data

D[3:0] D[7:4]

TAR

Sync

1111b Tri-State 0000b

1 Clock 1 Clock

Load Address in 8 Clocks

Load Data in 2 Clocks 2 Clocks

1 Clock

TAR

Next Start

0000b

1 Clock

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Publication Release Date: Apr. 11, 2006

Revision A1

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