W25P16 View Datasheet(PDF) - Winbond

Part Name

Description

Manufacturer

W25P16

8M-BIT AND 16M-BIT SERIAL FLASH MEMORY

Winbond 

W25P80 AND W25P16

6.1 Package Types

The W25P80/16 are primarily offered in SOIC packages. The W25P80 and W25P16 use an 8-pin

plastic 208-mil width SOIC (Winbond package code SS) (NexFlash package code S) and the W25P16

also uses a 16-pin plastic 300-mil width SOIC (Winbond package code SF) (NexFlash package code

F) as shown in figures 1A and 1B respectively. Package diagrams and dimensions are illustrated at

the end of this data sheet. Optional 8-contact MLP packages may be available. Please contact

Winbond for further MLP package information.

6.2 Chip Select (/CS)

The SPI Chip Select (/CS) pin enables and disables device operation. When /CS is high the device is

deselected and the Serial Data Output (DO) pin is at high impedance. When deselected, the devices

power consumption will be at standby levels unless an internal erase, program or status register cycle

is in progress. When /CS is brought low the device will be selected, power consumption will increase

to active levels and instructions can be written to and data read from the device. After power-up, /CS

must transition from high to low before a new instruction will be accepted. The /CS input must track

the VCC supply level at power-up (see “Write Protection” and figure 16). If needed a pull-up resister

on /CS can be used to accomplish this.

6.3 Serial Data Output (DO)

The SPI Serial Data Output (DO) pin provides a means for data and status to be serially read from

(shifted out of) the device. Data is shifted out on the falling edge of the Serial Clock (CLK) input pin.

6.4 Write Protect (/WP)

The Write Protect (/WP) pin can be used to prevent the Status Register from being written. Used in

conjunction with the Status Register’s Block Protect (BP2, BP1, and BP0) bits and Status Register

Protect (SRP) bits, a portion or the entire memory array can be hardware protected. The /WP pin is

active low.

6.5 HOLD (/HOLD)

The /HOLD pin allows the device to be paused while it is actively selected. When /HOLD is brought

low, while /CS is low, the DO pin will be at high impedance and signals on the DI and CLK pins will be

ignored (don’t care). When /HOLD is brought high, device operation can resume. The /HOLD function

can be useful when multiple devices are sharing the same SPI signals. (“See Hold function”)

6.6 Serial Clock (CLK)

The SPI Serial Clock Input (CLK) pin provides the timing for serial input and output operations. ("See

SPI "Operations")

6.7 Serial Data Input (DI)

The SPI Serial Data Input (DI) pin provides a means for instructions, addresses and data to be serially

written to (shifted into) the device. Data is latched on the rising edge of the Serial Clock (CLK) input

pin.

Publication Release Date: September 22, 2006

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Revision L

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