UPD161831 View Datasheet(PDF) - NEC => Renesas Technology

Part Name

Description

Manufacturer

UPD161831

240/244-OUTPUT TFT-LCD SOURCE DRIVER WITH TIMING GENERATOR (COMPATIBLE WITH 64-GRAY SCALES)

NEC => Renesas Technology 

µPD161831

4.2.8 Setting register

This register is used to set the low power mode and the direction of scanning. Data set to bits 6 and bit7 of these

register are ignored.

Bit Name

Bit 0

Bit 1

Bit 2

Bit 3

Bit 4

Bit 5

Bit 6, bit 7

Table 4−10. Setting Register (R6)

Mode

Adjusts the driver bias current of the µPD161831 to enter the low power mode. Since the through rate of

the operational amplifier inside the IC changes, be sure to carefully perform panel evaluation. Note that

the setting of this bit is reflected from the operation of the next line after the register values are set.

Bit 0 = 0: Driver output low power mode

Bit 0 = 1: Normal mode

Selects the scanning direction by using the GRL_O and GSTB_O pins. This bit becomes valid as soon as

it is set. Therefore, it must be set after gate scanning of one frame has been completed and before

scanning of the next frame is started. The setting of this bit is reflected in the operation immediately after

the register is set.

Bit 1 = 0: Reverse scan (scanning from bottom to top, GRL_O = L output)

Bit 1 = 1: Forward scan (scanning from top to bottom, GRL_O = H output)

Selects whether the display data input to the µPD161831 is input from S3 to S242, or vice versa.

<240 output selection>

Bit2 = 0: S242 → S3

Bit2 = 1: S3 → S242

<244 output selection>

Bit2 = 0: S244 → S1

Bit2 = 1: S1 → S244

The relationship between the input data and output pin is as follows:

The setting of this bit is reflected in the operation immediately after the register is set.

Selects whether the line or frame is inverted. In the 8-color mode, the power consumption can be further

reduced by selecting frame inversion.

The setting of this bit is reflected from the operation of the next line after the register is set.

Bit 3 = 0: Line inversion

Bit 3 = 1: Frame inversion

Performs GOE1 output control. When bit 4 = 0, a Low level is forcibly output to GOE1.

Bit 4 = 0: Forcible output of low level to GOE1.

Bit 4 = 1: Normal operation

Controls ON/OFF switching of square wave output from the COMC pin.

Bit 5 = 0: Output VSS level

Bit 5 = 1: Output square wave

Use prohibited

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Preliminary Product Information S16269EJ2V0PM

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