UPD16686P View Datasheet(PDF) - NEC => Renesas Technology

Part Name

Description

Manufacturer

UPD16686P

1/128 DUTY LCD CONTROLLER/DRIVER WITH FOUR-LEVEL GRAY SCALE, ON-CHIP RAM

NEC => Renesas Technology 

µPD16686, 16687

3.8 Display Modes .................................................................................................................................................56

3.8.1 Partial display mode ....................................................................................................................................56

3.8.2 Monochrome (black/white) display...............................................................................................................58

3.8.3 Icon display..................................................................................................................................................60

3.9 Reset ................................................................................................................................................................62

4. COMMANDS .......................................................................................................................................... 63

4.1 Control Register 1 (R0) ...................................................................................................................................64

4.2 Control Register 2 (R1) ...................................................................................................................................65

4.3 Reset Command (R2) ......................................................................................................................................66

4.4 X Address Register (R3) .................................................................................................................................66

4.5 Y Address Register (R4) .................................................................................................................................66

4.6 Duty Setting Register (R5)..............................................................................................................................67

4.7 AC Driver Inversion Cycle Register (R6) .......................................................................................................67

4.8 AC Driver Inversion Position Shift Register (R7)..........................................................................................68

4.9 Partial AC Driver Inversion Cycle Register (R8) ...........................................................................................68

4.10 Partial AC Driver Inversion Position Shift Register (R9)............................................................................69

4.11 Partial Display Mode Setting (R10) ..............................................................................................................69

4.12 Display Memory Access Register (R11) ......................................................................................................70

4.13 Display Start Line Set (R12) .........................................................................................................................70

4.14 Blink X Address Register (R13)....................................................................................................................70

4.15 Blink Start Line Address Register (R14) .....................................................................................................71

4.16 Blink End Line Address Register (R15).......................................................................................................71

4.17 Blink Data Memory (R16) ..............................................................................................................................71

4.18 Inverted X Address Register (R17) ..............................................................................................................72

4.19 Inversion Start Line Address Register (R18) ..............................................................................................72

4.20 Inversion End Line Address Register (R19)................................................................................................72

4.21 Inverted Data Memory (R20) .........................................................................................................................73

4.22 Partial Start Line Address Register (R21) ...................................................................................................73

4.23 Gray Scale Data Registers 1 to 4 (R23, R24, R25, R26)..............................................................................74

4.24 Partial Gray Scale Data Registers 1 to 4 (R27, R28, R29, R30) ..................................................................74

4.25 Power System Control 1 (R32) .....................................................................................................................75

4.26 Power System Control 2 (R33) .....................................................................................................................76

4.27 Power System Control 3 (R34) .....................................................................................................................77

4.28 Electronic Volume Register (R35)................................................................................................................78

4.29 Partial Electronic Volume Register (R36)....................................................................................................78

4.30 Boost Adjustment Register (R37) ................................................................................................................78

4.31 Static Icon Address (R40).............................................................................................................................79

4.32 Static Icon Data Register (R41) ....................................................................................................................79

4.33 Static Icon Contrast (R42) ............................................................................................................................79

4.34 RAM Test Mode Setting (R44) ......................................................................................................................80

4.35 Signature Read (R45) ....................................................................................................................................80

12

Data Sheet S15548JJ1V0DS

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