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UCC2880DW-5 View Datasheet(PDF) - Texas Instruments

Part NameDescriptionManufacturer
UCC2880DW-5 Pentium® Pro Controller TI
Texas Instruments TI
UCC2880DW-5 Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
UCC2880-4/-5/-6
UCC3880-4/-5/-6
ELECTRICAL CHARACTERISTICS (cont.): Unless otherwise specified, VIN = 12V, VSENSE = 3.5V, VENBL = 5V, VD0 =
VD1 = VD2 = VD3 = 0V, 0°C < TA < 70°C, TA = TJ.
PARAMETER
TEST CONDITIONS
MIN TYP MAX
Oscillator
Frequency (-4)
85 100 115
Frequency (-5)
200
Frequency (-6)
400
Frequency Change With Voltage 10.8V < VIN < 15V
1
Output Section
Maximum Duty Cycle
90 95 99
Output Low Voltage
IGATE = –100mA
0.20
Output High Voltage
IGATE = 100mA
11.8
Rise Time
CGATE = 3.3nF
20 80
Fall Time
CGATE = 3.3nF
15 80
Output Impedance
IGATE = 100mA
2
IGATE = –100mA
2
Foldback Current Limit
Clamp Level
Measured at Voltage EA Output;
4.4
VSENSE = VCOMMAND = 3V
VCOMMAND = 3V, VSENSE = 0
3.7
Note 1: This percentage is measured with respect to the ideal COMMAND voltage programmed by the D0 - D3 pins.
UNITS
kHz
kHz
kHz
%
%
V
V
ns
ns
V
V
PIN DESCRIPTIONS (cont.)
CAM (Current Amplifier Inverting Input): The average
load current feedback from ISOUT is applied through a
resistor to this pin. The current loop compensation net-
work is also connected to this pin (see CAO below).
CAO (Current Amplifier Output): The current loop com-
pensation network is connected between this pin and
CAM. The voltage on this pin is the input to the PWM
comparator and regulates the output voltage of the sys-
tem. The GATE output is disabled (held low) unless the
voltage on this pin exceeds 1V, allowing the PWM to
force zero duty cycle when necessary. The PWM forces
maximum duty cycle when the voltage on CAO exceeds
the oscillator peak voltage (3V). A 3.2V clamp circuit pre-
vents the CAO voltage from rising excessively past the
oscillator peak voltage for excellent transient response.
COMMAND (Digital-to-Analog Converter Output Volt-
age): This pin is the output of the 4-bit digital-to-analog
converter (DAC) and the noninverting input of the voltage
amplifier. The voltage on this pin sets the switching regu-
lator output voltage. Setting all input control codes low
produces 3.5V at COMMAND; setting all codes high pro-
duces 2.0V at COMMAND. The DAC LSB step size (i.e.
resolution) is 100mV (See Table 1). The COMMAND
source impedance is typically 1.2kand must therefore
drive only high impedance inputs if accuracy is to be
maintained. Bypass COMMAND with a 0.01µF, low ESR,
low ESL capacitor for best circuit noise immunity.
Decimal D3
D2
D1
D0 COMMAND
Code
Voltage
15
1
1
1
1
2.0
14
1
1
1
0
2.1
13
1
1
0
1
2.2
12
1
1
0
0
2.3
11
1
0
1
1
2.4
10
1
0
1
0
2.5
9
1
0
0
1
2.6
8
1
0
0
0
2.7
7
0
1
1
1
2.8
6
0
1
1
0
2.9
5
0
1
0
1
3.0
4
0
1
0
0
3.1
3
0
0
1
1
3.2
2
0
0
1
0
3.3
1
0
0
0
1
3.4
0
0
0
0
0
3.5
Table 1. Programming the COMMAND Voltage
COMP (Voltage Amplifier Output): The system voltage
compensation network is applied between COMP and
VFB.
D0 - D3 (DAC Digital Input Control Codes): These are
the DAC digital input control codes, with D0 representing
the least significant bit (LSB) and D3, the most significant
bit (MSB). A bit is set low by being connected to GND. A
4
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