U6815BM View Datasheet(PDF) - Atmel Corporation
Part Name
Description
Manufacturer
U6815BM Datasheet PDF : 14 Pages
| |||
12. Electrical Characteristics (Continued)
7.5V < VVS < 40V; 4.5V < VVCC < 5.5V; INH = High; –40°C < Tj < 150°C; unless otherwise specified, all values refer to GND pins.
Parameters
Test Conditions/Pins
Symbol
Min.
Typ.
Max. Unit
Serial Interface - Logic Inputs (DI, CLK, CS)
Input voltage low level threshold
Pins 24 to 26
Input voltage high level threshold
Hysteresis of input voltage
Pull-down current, Pins DI and CLK
Pull-up current Pin CS
Serial Interface - Logic Output (DO)
Pins 24 to 26
Pins 24 to 26
VDI, VCLK = VVCC, pins 25, 26
VCS= 0V, pin 24
VIL
VIH
ΔVI
IPDSI
IPUSI
0.3 ×
VVCC
50
2
–50
V
0.7 ×
VVCC
V
500
mV
50
µA
–2
µA
Output voltage low level
Output voltage high level
IOL = 3 mA, pin 18
IOL = –2 mA, pin 18
VDOL
VDOH
VVCC –
1V
0.5
V
V
Leakage current (tristate)
VCS = VVCC, 0V < VDO < VVCC, pin 18
IDO
–10
Notes: 1. Only valid for version U6815BM-N.
10
mA
2. Delay time between rising edge of CS after data transmission and switch-on output stages to 90% of final level.
13. Serial Interface – Timing
Parameters
Test Conditions
DO enable after CS
falling edge
CDO = 100 pF
DO disable after CS
rising edge
CDO = 100 pF
DO fall time
DO rise time
DO valid time
CS setup time
CDO = 100 pF
CDO = 100 pF
CDO = 100 pF
CS setup time
CS high time
VDO < 0.2 × VVCC
Input register,
Bit 14 (SCT) = high
Input register,
Bit 14 (SCT) = low
CLK high time
CLK low time
CLK period time
CLK setup time
CLK setup time
DI setup time
DI hold time
Note: 1. see Figure 13-1 on page 11
Timing Chart No.(1)
1
2
–
–
10
4
8
9
9
5
6
–
7
3
11
12
Symbol
tENDO
tDISDO
tDOf
tDOr
tDOVal
tCSSethl
tCSSetlh
tCSh
tCSh
tCLKh
tCLKl
tCLKp
tCLKSethl
tCLKSetlh
tDIset
tDIHold
Min.
225
225
140
17.5
225
225
500
225
225
40
40
Typ.
Max. Unit
200
ns
200
ns
100
ns
100
ns
200
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
10 U6815BM
4545D–BCD–04/09
|
|
Share Link: 