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TSC80C31-40AGDP883 View Datasheet(PDF) - Temic Semiconductors

Part NameTSC80C31-40AGDP883 Temic
Temic Semiconductors Temic
DescriptionCMOS 0 to 44 MHz Single-Chip 8 Bit Microcontroller


TSC80C31-40AGDP883 Datasheet PDF : 19 Pages
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TSC80C31/80C51
Interface
Figure 1. Block Diagram
2
MATRA MHS
Rev. E (14 Jan.97)
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Description
The TSC80C31/80C51 is high performance SCMOS versions of the 8051 NMOS single chip 8 bit µC. The fully static design of the TSC80C31/80C51 allows to reduce system power consumption by bringing the clock frequency down to any value, even DC, without loss of data.
The TSC80C31/80C51 retains all the features of the 8051 : 4 K bytes of ROM ; 128 bytes of RAM ; 32 I/O lines ; two 16 bit timers ; a 5-source, 2-level interrupt structure ; a full duplex serial port ; and on-chip oscillator and clock circuits.

Features
Power control modes
128 bytes of RAM
4 K bytes of ROM (TSC80C31/80C51)
32 programmable I/O lines
Two 16 bit timer/counter
64 K program memory space
64 K data memory space

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