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TSC80C31-36MYD View Datasheet(PDF) - Temic Semiconductors

Part NameDescriptionManufacturer
TSC80C31-36MYD CMOS 0 to 44 MHz Single-Chip 8 Bit Microcontroller Temic
Temic Semiconductors Temic
TSC80C31-36MYD Datasheet PDF : 19 Pages
First Prev 11 12 13 14 15 16 17 18 19
TSC80C31/80C51
Absolute Maximum Ratings*
Ambient Temperature Under Bias :
C = Commercial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
I = Industrial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 85°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . –65°C to + 150°C
Voltage on VCC to VSS . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to + 7 V
Voltage on Any Pin to VSS . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 W**
** This value is based on the maximum allowable die temperature and
the thermal resistance of the package
DC Characteristics : Low Power Version
* Notice
Stresses at or above those listed under “ Absolute Maximum Ratings”
may cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions may affect
device reliability.
TA = 0°C to 70°C ; Vcc = 2.7 V to 5.5 V ; Vss = 0 V ; F = 0 to 20 MHz
TA = –40°C to 85°C ; Vcc = 2.7 V to 5.5 V ; F = 0 to 20 MHz
Symbol
Parameter
VIL Input Low Voltage
VIH Input High Voltage (Except XTAL and RST)
VIH2 Input High Voltage to RST for Reset
VIH1 Input High Voltage to XTAL1
VPD Power Down Voltage to Vcc in PD Mode
VOL Output Low Voltage (Ports 1, 2, 3) (4)
VOL1 Output Low Voltage Port 0, ALE, PSEN (4)
VOH Output High Voltage (Port 1, 2 and 3)
VOH1 Output High Voltage (Port 0 in External Bus Mode),
ALE, PSEN
IIL Logical 0 Input Current Ports 1, 2, 3
ILI Input Leakage Current
ITL Logical 1 to 0 Transition Current (Ports 1, 2, 3)
IPD Power Down Current
RRST RST Pulldown Resistor
CIO Capacitance of I/O Buffer
Min Typ (3) Max Unit Test Conditions
– 0.5
0.2 VCC + 0.9
0.7 VCC
0.7 VCC
2.0
0.2 VCC – 0.1 V
VCC + 0.5 V
VCC + 0.5 V
VCC + 0.5 V
5.5
V
0.45
V IOL = 0.8 mA (2)
0.45
V IOL = 1.6 mA (2)
0.9 Vcc
V IOH = – 10 µA
0.9 Vcc
V IOH = – 40 µA
– 50
µA Vin = 0.45 V
± 10
– 650
µA 0.45 < Vin < VCC
µA Vin = 2.0 V
5
30
µA VCC = 2.0 V to 5.5 V
(1)
50
90
200
k
10
pF fc = 1 MHz, TA = 25_C
Icc (mA)
Operating (1)
Frequency/Vcc
2.7 V
3V
3.3 V
Max Typ Max Typ Max Typ
1 MHz
0.8
0.37
1
0.42
1.1
0.46
6 MHz
4
2.2
5
2.5
6
2.7
12 MHz
8
4
10
4.7
12
5.3
16 MHz
10
5
12
5.8
14
6.6
Freq > 12MHz (Vcc = 5.5 V)
Icc op max (mA) = 0.9 × Freq (MHz) + 5
Icc Idle max (mA) = 0.3 × Freq (MHz) + 1.7
2.7 V
Max Typ
0.4
0.22
1.5
1.2
2.5
1.7
3
1.9
Idle (1)
3V
Max Typ
0.5
0.24
1.7
1.4
3
2.2
3.8
2.5
3.3 V
Max Typ
0.6
0.27
2
1.6
3.5
2.6
4.5
3
12
MATRA MHS
Rev. E (14 Jan.97)
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