TLE4291E View Datasheet(PDF) - Infineon Technologies
Part Name
Description
Manufacturer
TLE4291E Datasheet PDF : 28 Pages
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TLE4291
Watchdog Function
VWI
VWI,hi
-dVWI / dt
tWI,hi
tWI,lo
VWI,lo
d VWI / d t
t
Figure 9 Test Pulses Watchdog Input WI
VWI
VWI,hi
tWI,hi
VWI,lo
tWI,lo
t
Watchdog Timing
Positive edges at the watchdog input pin “WI” are expected within the watchdog trigger time frame tWI,tr, otherwise
a low signal at pin “WO” is generated. If a watchdog low signal at pin “WO” is generated, it remains low for tWD,lo.
All watchdog timings are defined by charging and discharging the capacitor CD at pin “D”. Thus, the watchdog
timing can be programmed by selecting CD. For timing details see also Figure 10.
In case a watchdog trigger time period tWI,tr different from the value for CD = 100nF is required, the delay
capacitor’s value can be derived from the specified value given in Item 9.2.5:
CD = 100nF × tWI,tr / tWI,tr,100nF
(4)
The watchdog output low time tWD,lo and the watchdog period tWD,p then becomes:
tWD,lo = tWD,lo,100nF × CD / 100nF
(5)
tWD,p = tWI,tr + tWD,lo
(6)
The formula is valid for CD ≥ 10nF. For precise timing calculations consider also the delay capacitor’s tolerance.
VWI
VWI,hi
VWI,lo
VD
VDW,hi
No positive
VWI edge
dVWI / dt
outside spec
tWI,lo
tWI,hi
t
tWI,tr
TWI,p
VDW,lo
VWO
t
tWD,lo
tWD,lo
VWO,low
Figure 10 Timing Diagram Watchdog
Data Sheet
23
t
TimingDiagram_Watchdog.vs d
Rev. 1.1, 2012-12-03
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