TISP7125F3DR-S View Datasheet(PDF) - Bourns, Inc
Part Name
Description
Manufacturer
TISP7125F3DR-S
Bourns, Inc
TISP7125F3DR-S Datasheet PDF : 19 Pages
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TISP7xxxF3 (MV, HV) Overvoltage Protector Series
APPLICATIONS INFORMATION
Lightning Surge (continued)
ITU-T 10/700 Generator (continued)
VC
2.8 kV SW
R2
15 Ω
C1
20 µF
R1
50 Ω
C2
200 nF
R3
25 Ω
70 A
5/310
R
T
R
R
T
70 A
5/310
G
G
G
T
10/700 GENERATOR - SINGLE TERMINAL PAIR TEST
T AND G
TEST
R AND G
TEST
R AND T
TEST
VC
5.2 kV SW
R2
15 Ω
R4
25 Ω
R3
25 Ω
95 A
4/250
95 A
4/250
T
R
C1
20 µF
R1
50 Ω
C2
200 nF
190 A
4/250
G
10/700 GENERATOR - DUAL TERMINAL PAIR TEST
Figure 33.
DUAL
T AND G,
R AND G
TEST
With the generator output open circuit, when SW closes, C1 discharges through R1. The decay time constant will be C1R1, or 20 x 50 =
1000 µs. For the 50 % voltage decay time, the time constant needs to be multiplied by 0.697, giving 0.697 x 1000 = 697 µs which is rounded to
700 µs.
The output rise time is controlled by the time constant of R2 and C2, which is 15 x 200 = 3000 ns or 3 µs. Virtual voltage rise times are given
by straight line extrapolation through the 30 % and 90 % points of the voltage waveform to zero and 100 %. Mathematically, this is equivalent to
3.24 times the time constant, which gives 3.24 x 3 = 9.73 which is rounded to 10 µs. Thus, the open circuit voltage rises in 10 µs and decays in
700 µs, giving the 10/700 generator its name.
When the overvoltage protector switches, it effectively shorts the generator output via the series 25 Ω resistor. Two short circuit conditions
need to be considered: single output using R3 only (top circuit of Figure 33) and dual output using R3 and R4 (bottom circuit of Figure 33).
For the single test, the series combination of R2 and R3 (15 + 25 = 40 Ω) is in shunt with R1. This lowers the discharge resistance from 50 Ω to
22.2 Ω, giving a discharge time constant of 444 µs and a 50% current decay time of 309.7 µs, which is rounded to 310 µs.
For the rise time, R2 and R3 are in parallel, reducing the effective source resistance from 15 Ω to 9.38 Ω, giving a time constant of 1.88 µs.
Virtual current rise times are given by straight line extrapolation through the 10 % and 90 % points of the current waveform to zero and 100 %.
Mathematically, this is equivalent to 2.75 times the time constant, which gives 2.75 x 1.88 = 5.15, which is rounded to 5 µs. Thus, the short
circuit current rises in 5 µs and decays in 310 µs, giving the 5/310 wave shape.
The series resistance from C1 to the output is 40 Ω, giving an output conductance of 25 A/kV. For each 1 kV of capacitor charge voltage, 25 A
of output current will result.
For the dual test, the series combination of R2 plus R3 and R4 in parallel (15 + 12.5 = 27.5 Ω) is in shunt with R1. This lowers the discharge
resistance from 50 Ω to 17.7 Ω, giving a discharge time constant of 355 µs and a 50% current decay time of 247 µs, which is rounded to
250 µs.
For the rise time, R2, R3 and R4 are in parallel, reducing the effective source resistance from 15 Ω to 6.82 Ω, giving a time constant of 1.36 µs,
which gives a current rise time of 2.75 x 1.36 = 3.75, which is rounded to 4 µs. Thus, the short circuit current rises in 4 µs and decays in 250
µs, giving the 4/250 wave shape.
MARCH 1994 - REVISED MARCH 2006
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
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