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TEA1062ANG-D16-T View Datasheet(PDF) - Unisonic Technologies

Part Name
Description
Manufacturer
TEA1062ANG-D16-T Datasheet PDF : 13 Pages
First Prev 11 12 13
TEA1062N/TEA1062AN
LINEAR INTEGRATED CIRCUIT
QR 4
QR 4 (1)
QR 4 (2)
VEE 9
VEE 9
VEE 9
(a)
(b)
(c)
Fig.11 Alternative receiver arrangement
(a) Dynamic earpiece.
(b) Magnetic earpiece. The resistor marked(1) may be connected to prevent distortion(inductive load)
(c) Piezoelectric earpiece. The earpiece marked(2) is required to increase the phase margin (capacitive load)
Gv
(dB)
0
R6=
-2
R9=20
-4
(1) (2) (3)
-6
(1) R6= 78.7k
(2) R6= 110k
(3) R6= 140k
0 20 40 60 80 100 120 140
Iline (mA)
Fig. 12 Variation of gain with line current, with R6 as a parameter.
Rexch(Ω)
400
600
800
1000
R6(kΩ)
36
100
78.7
×
×
Vexch(V)
48
140
110
93.1
82
60
×
×
120
102
Table 1 Values of resistor R6 for optimum line loss compensation for various usual values of exchange
supply voltage (Vexch) and exchange feeding bridge resistance(Rexch);R9=20Ω.
R1 620Ω
Vi
C1
100 μF
10 μF
Vi
13
10 IR VCC
7 MIC+
6 MIC-
1
LN QR 4
GAR 5
R4
100kΩ
11 DTMF
GAS1 2
12 MUTE
R7
GAS2 3 68kΩ
VEE REG AGC STAB SLPE
9
14 15 8 16
C3
4.7 μF
R6
R5 R9
3.6kΩ 20Ω
100 μF
C4
100pF
RL
600Ω
C7 1nF
Vo
C8 1nF
C6
100pF
10 TO 140 mA
Fig.13 Test circuit defining voltage gain of MIC+, MIC- and DTMF inputs.
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
11 of 13
QW-R108-011.C
 

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