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TEA1552T View Datasheet(PDF) - Philips Electronics

Part Name
Description
Manufacturer
TEA1552T
Philips
Philips Electronics Philips
TEA1552T Datasheet PDF : 24 Pages
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Philips Semiconductors
GreenChipII SMPS control IC
f
handbook, halfp(akgHe z)
125
VCO
fixed
MBL500
quasi resonant
Product specification
TEA1552
The maximum fixed frequency of the oscillator is set by an
internal current source and capacitor. The maximum
frequency is reduced once the control voltage enters the
VCO control window. Then, the maximum frequency
changes linearly with the control voltage until the minimum
frequency is reached (see Figs 5 and 6).
25
P (W)
Fig.4 Multi mode operation.
f
handbook, halfp(akgHe z)
125
MBL501
125 kHz
25
Current mode control
Current mode control is used for its good line regulation
behaviour.
The ‘on-time’ is controlled by the internally inverted control
pin voltage, which is compared with the primary current
information. The primary current is sensed across an
external resistor. The driver output is latched in the logic,
preventing multiple switch-on.
The internal control voltage is inversely proportional to the
external control pin voltage, with an offset of 1.5 V. This
means that a voltage range from 1 to 1.5 V on pin CTRL
will result in an internal control voltage range from
0.5 to 0 V (a high external control voltage results in a low
duty cycle).
VCO2 VCO1 Vsense(max) (V)
level level
Fig.6 VCO frequency as a function of Vsense(max).
VCO adjustment
The VCOadj pin can be used to set the VCO operation
point. As soon as the peak voltage on the sense resistor is
controlled below half the voltage on the VCOadj pin (VCO1
level), frequency reduction will start. The actual peak
voltage on sense will be somewhat higher due to switch-off
delay (see Fig.7). The frequency reduction will stop
approximately 25 mV lower (VCO2 level), when the
minimum frequency is reached.
Oscillator
handbook, halVfpsaegnese(max)
0.52 V
MGU233
1V
(typ)
1.5 V
(typ)
VCTRL
Fig.5 Vsense(max) as a function of VCTRL.
Cycle skipping
At very low power levels, a cycle skipping mode will be
activated. A high control voltage will reduce the switching
frequency to a minimum of 25 kHz. If the voltage on the
control pin has raised even more, switch-on of the external
power MOSFET will be inhibited until the voltage on the
control pin has dropped to a lower value again (see Fig.7).
For system accuracy, it is not the absolute voltage on the
control pin that will trigger the cycle skipping mode, but a
signal derived from the internal VCO will be used.
Remark: If the no-load requirement of the system is such
that the output voltage can be regulated to its intended
level at a switching frequency of 25 kHz or above, the
cycle skipping mode will not be activated.
2002 Aug 27
6
 

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