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TEA1114A View Datasheet(PDF) - Philips Electronics

Part Name
Description
Manufacturer
TEA1114A Datasheet PDF : 28 Pages
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Philips Semiconductors
Low voltage telephone transmission circuit with
dialler interface and regulated strong supply
Product specification
TEA1114A
FUNCTIONAL DESCRIPTION
All data given in this chapter are typical values, except
when otherwise specified.
Supply (pins LN, SLPE, REG, VCC and VDD)
The supply for the TEA1114A and its peripherals is
obtained from the telephone line (see Fig.3).
THE LINE INTERFACE (PINS LN, SLPE AND REG)
The IC generates a stabilized reference voltage (Vref)
between pins LN and SLPE. Vref is temperature
compensated and can be adjusted by means of an
external resistor (RVA). Vref equals 4.15 V and can be
increased by connecting RVA between pins REG and
SLPE or decreased by connecting RVA between pins
REG and LN. The voltage at pin REG is used by the
internal regulator to generate Vref and is decoupled by
CREG, which is connected to VEE. This capacitor,
converted into an equivalent inductance
(see Section “Set impedance”) realizes the set impedance
conversion from its DC value (RSLPE) to its AC value
(RCC in the audio-frequency range). The voltage at
pin SLPE is proportional to the line current.
The voltage at pin LN is:
VLN = Vref + RSLPE × ISLPE
ISLPE = Iline ICC IP ISUP
where:
Iline = line current
ICC = current consumption of the IC
IP = supply current for external circuits
ISUP = current consumed between LN and VEE by the
VDD regulator.
The preferred value for RSLPE is 20 . Changing RSLPE will
affect more than the DC characteristics; it also influences
the microphone and DTMF gains, the gain control
characteristics, the sidetone level and the maximum
output swing on the line.
The DC line current flowing into the set is determined by
the exchange supply voltage (VEXCH), the feeding bridge
resistance (REXCH), the DC resistance of the telephone
line (Rline) and the reference voltage (Vref). With line
currents below 9 mA, the internal reference voltage
(generating Vref) is automatically adjusted to a lower value.
This means that more sets can operate in parallel with
DC line voltages (excluding the polarity guard) down to an
absolute minimum voltage of 1.45 V. At currents below
9 mA, the circuit has limited sending and receiving levels.
This is called the low voltage area.
handbook, full pagewidth Rline
Iline
REXCH
TEA1114A
from preamplifier
RCC
ILN
ICC
LN
VCC
ISUP
internal
circuitry
VDD
REGULATOR
VDD
IDD
CVCC
IP
100 µF
external
circuits
VEXCH
REG
CREG
4.7 µF
SLPE
ISLPE
RSLPE
20
VEE
Fig.3 Supply configuration.
peripherals
CVDD
220 µF
MGK805
2000 Mar 21
6
 

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