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7025ERPQI35 View Datasheet(PDF) - MAXWELL TECHNOLOGIES

Part Name
Description
Manufacturer
7025ERPQI35
Maxwell
MAXWELL TECHNOLOGIES Maxwell
7025ERPQI35 Datasheet PDF : 20 Pages
First Prev 11 12 13 14 15 16 17 18 19 20
(8K x 16-Bit) Dual Port RAM High-Speed CMOS
FIGURE 14. TIMING WAVEFORM OF SEMAPHORE CONTENTION 1,3,4
7025E
1. DOR = DOL = VIL, CSR = CSL = VIH, semaphore Flag is released from both sides (reads as ones from both sides) at
cycle start.
2. Either side “A” = left and side “B” = right, or side “A” = right and side “B” = left.
3. This parameter is measured from the point where R/WA or SEMA goes high until R/WB or SEMB goes high.
4. If tSPS is violated, the semaphore will fall positively to one side or the other, but there is no guaranty which side will
obtain the flag.
1000586
12.19.01 Rev 2
All data sheets are subject to change without notice 17
©2001 Maxwell Technologies
All rights reserved.
 

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