DatasheetQ Logo
Electronic component search and free download site.
Transistors,MosFET ,Diode,Integrated circuits

CXD3027R View Datasheet(PDF) - Sony Semiconductor

Part Name
Description
Manufacturer
CXD3027R Datasheet PDF : 192 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
CXD3027R
Pin
No.
Symbol
I/O
Description
95 XVSS
——
96 AVDD1 — —
Master clock GND.
Analog power supply.
97 LOUT1 O
Lch LINE output.
98 AIN1
I
Lch operational amplifier input.
99 AOUT1 O
Lch analog output.
100 AVSS1 — —
101 AVSS2 — —
102 AOUT2 O
Analog GND.
Analog GND.
Rch analog output.
103 AIN2
I
Rch operational amplifier input.
104 LOUT2 O
Rch LINE output.
105 AVDD2
106 A3
——
O 1, 0
Analog power supply.
4M-bit/16M-bit DRAM address bus 3.
107 A2
O 1, 0 4M-bit/16M-bit DRAM address bus 2.
108 A1
O 1, 0 4M-bit/16M-bit DRAM address bus 1.
109 A0
O 1, 0 4M-bit/16M-bit DRAM address bus 0.
110 DVDD — — DRAM interface power supply.
111 A10
O 1, 0 16M DRAM address bus 10.
112 A11
O 1, 0 16M DRAM address bus 11.
113 XRAS O 1, 0 DRAM row address strobe signal.
114 XWE
O 1, 0 DRAM data input enable signal.
115 D1
I/O 1, 0 DRAM data bus 1.
116 D0
I/O 1, 0 DRAM data bus 0.
117 D3
I/O 1, 0 DRAM data bus 3.
118 D2
I/O 1, 0 DRAM data bus 2.
119 XCAS O 1, 0 DRAM column address strobe signal.
120 XOE
O 1, 0 DRAM data output enable signal.
Notes) • PCMD is a MSB first, two's complement output.
GTOP is used to monitor the frame sync protection status. (High: sync protection window released.)
XUGF is the frame sync obtained from the EFM signal, and is negative pulse. It is the signal before
sync protection.
XPCK is the inverse of the EFM PLL clock. The PLL is designed so that the falling edge and the EFM
signal transition point coincide.
The GFS signal goes high when the frame sync and the insertion protection timing match.
RFCK is derived from the crystal accuracy, and has a cycle of 136µs.
C2PO represents the data error status.
XROF is generated when the 32K RAM exceeds the ±28F jitter margin.
C4M is a 4.2336MHz output that changes in CAV-W mode and variable pitch mode.
FSTO is the 2/3 frequency-division output of the XTAI pin.
SOUT is the serial data output inside the servo block.
SOCK is the serial data readout clock output inside the servo block.
XOLT is the serial data latch output inside the servo block.
7
 

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]