CXD3027R
Command bit
VCOSEL2 = 0
VCOSEL2 = 1
Processing
Wide-band PLL VCO2 is set to normal speed.
Wide-band PLL VCO2 is set to approximately twice the normal speed.
Command bit
KSL1
KSL0
0
0
0
1
1
0
1
1
Processing
Output of wide-band PLL VCO2 is 1/1 frequency-divided.
Output of wide-band PLL VCO2 is 1/2 frequency-divided.
Output of wide-band PLL VCO2 is 1/4 frequency-divided.
Output of wide-band PLL VCO2 is 1/8 frequency-divided.
∗ Block Diagram of VCO Internal Path
VCO1SEL
1/1
No.1 VCO1
1/2
1/4
No.2 VCO1
VCO1CS0
1/8
To DSP interior
KSL3, 2
VCO1 internal path
VCO2SEL
VCO2
1/1
1/2
To DSP interior
1/4
1/8
KSL1, 0
VCO2 internal path
– 44 –