T89C51RD2
Figure 19. Power-down Exit Waveform
INT0
INT1
XTALA
or
XTALB
Active Phase
Power-down Phase
Oscillator Restart Phase
Active Phase
Exit from Power-down by reset redefines all the SFRs, exit from Power-down by exter-
nal interrupt does no affect the SFRs.
Exit from Power-down by either reset or external interrupt does not affect the internal
RAM content.
Note:
If idle mode is activated with Power-down mode (IDL and PD bits set), the exit sequence
is unchanged, when execution is vectored to interrupt, PD and IDL bits are cleared and
idle mode is not entered.
Table 27 shows the state of ports during idle and power-down modes.
Table 27. State of Ports
Mode
Idle
Idle
Power Down
Power Down
Program Memory
Internal
External
Internal
External
ALE
1
1
0
0
PSEN
1
1
0
0
PORT0
Port Data(1)
Floating
Port Data(1)
Floating
PORT1
Port Data
Port Data
Port Data
Port Data
Port 0 can force a 0 level. A "one" will leave port floating.
PORT2
Port Data
Address
Port Data
Port Data
PORT3
Port Data
Port Data
Port Data
Port Data
45
4243G–8051–05/03