T89C51RD2-SMUCM View Datasheet(PDF) - Atmel Corporation

Part Name

Description

Manufacturer

T89C51RD2-SMUCM

0 to 40MHz Flash Programmable 8-bit Microcontroller

Atmel Corporation 

Figure 7. PCA Timer/Counter

Fosc /12

Fosc / 4

T0 OVF

P1.2

To PCA

modules

overflow

It

CH

CL

16 bit up/down counter

CIDL WDTE

CPS1 CPS0 ECF

CMOD

0xD9

Idle

CF CR

CCF4 CCF3 CCF2 CCF1 CCF0

CCON

0xD8

Table 10. CMOD: PCA Counter Mode Register

CMOD

Address 0D9H

CIDL

WDT

E

-

-

- CPS1 CPS0 ECF

Reset value

0

0

X

X

X

0

0

0

Symbol Function

CIDL

Counter Idle control: CIDL = 0 programs the PCA Counter to continue functioning during

idle Mode. CIDL = 1 programs it to be gated off during idle.

WDTE

-

Watchdog Timer Enable: WDTE = 0 disables Watchdog Timer function on PCA Module 4.

WDTE = 1 enables it.

Not implemented, reserved for future use. (1)

CPS1

PCA Count Pulse Select bit 1.

CPS0

PCA Count Pulse Select bit 0.

CPS

1

CPS

0

Selected PCA input. (2)

0

0 Internal clock fosc/12 ( Or fosc/6 in X2 Mode).

0

1 Internal clock fosc/4 ( Or fosc/2 in X2 Mode).

1

0 Timer 0 Overflow

ECF

1

1 External clock at ECI/P1.2 pin (max rate = fosc/ 8)

PCA Enable Counter Overflow interrupt: ECF = 1 enables CF bit in CCON to generate an

interrupt. ECF = 0 disables that function of CF.

1.

User software should not write 1s to reserved bits. These bits may be used in future 8051

family products to invoke new features. In that case, the reset or inactive value of the

new bit will be 0, and its active value will be 1. The value read from a reserved bit is

indeterminate.

2.

fosc = oscillator frequency

24 T89C51RD2

4243G–8051–05/03

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