T89C51RD2-SMSCL View Datasheet(PDF) - Atmel Corporation
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Description
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T89C51RD2-SMSCL Datasheet PDF : 104 Pages
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T89C51RD2
Dual Data Pointer
Register Ddptr
Figure 3. Use of Dual Pointer
The additional data pointer can be used to speed up code execution and reduce code
size.
The dual DPTR structure is a way by which the chip will specify the address of an exter-
nal data memory location. There are two 16-bit DPTR registers that address the external
memory, and a single bit called
DPS = AUXR1/bit0 (See Table 5.) that allows the program code to switch between them
(Refer to Figure 3).
External Data Memory
7
0
DPS
AUXR1(A2H)
DPTR1
DPTR0
DPH(83H) DPL(82H)
Table 5. AUXR1: Auxiliary Register 1
AUXR1
Address 0A2H
-
-
-
-
GF3
0
-
DPS
Reset value
X
X
X
X
0
0
X
0
Symbol
-
Function
Not implemented, reserved for future use. (1)
DPS
Data Pointer Selection.
DPS Operating Mode
0
DPTR0 Selected
1
DPTR1 Selected
GF3
This bit is a general purpose user flag(2).
1.
User software should not write 1s to reserved bits. These bits may be used in future 8051
family products to invoke new feature. In that case, the reset value of the new bit will
be 0, and its active value will be 1. The value read from a reserved bit is
indeterminate.
2. Bit 2 stuck at 0; this allows to use INC AUXR1 to toggle DPS without changing GF3.
13
4243G–8051–05/03
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