STV9381
1 PIN FUNCTIONS
Pin
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Name
-VCC
-VCC
-VCC
OUT
CFLY+
CFLY-
BOOT
VREG
FEEDCAP
FREQ
SGND
IN-
IN+
EA out
+VCC
+VCCPOW
-VccPOW
-VCC
-VCC
-VCC
Negative supply
Negative supply
Negative supply
PWM Output
Flyback capacitor
Flyback capacitor
Bootstrap capacitor
Internal voltage regulator
Feed-back integrating capacitor
Frequency setting resistor
Signal Ground
Error amplifier inverting input
Error amplifier non-inverting input
Error amplifier output
Positive supply
Positive Power supply
Negative Power supply
Negative supply
Negative supply
Negative supply
Function
2 FUNCTIONAL DESCRIPTION
The STV9381 is a vertical deflection circuit operating in class D. The class D is a modulation method
where the output transistors work in switching mode at high frequency. The output signal is restored by fil-
tering the output square wave with an external LC filter. The major interest of this IC is the low power dis-
sipation comparatively to traditional amplifiers operating in class AB, eliminating the need of an heatsink.
Except for the output stage which uses the class D modulation, the circuit operation is similar to the one
of a traditional linear vertical amplifier.
A reference signal (sawtooth) has to be applied to the circuit which can accept a differential or single end-
ed signal. This sawtooth is amplified and applied as a current to the deflection yoke. This current is meas-
ured by means of a low value resistor. The resulting voltage is used as a feed-back signal to guarantee the
conformity of the yoke current with the reference input signal.
The overvoltage necessary for a fast retrace is obtained with a chemical capacitor charged at the power
supply voltage of the circuit. At the flyback moment this capacitor is connected in series with the output
stage power supply. This method, used for several years with the linear vertical boosters and called “in-
ternal flyback” or “flyback generator”, avoids the need of an additional power supply, while reducing the
flyback duration.
The circuit uses a BCD process that combines Bipolar, CMOS and DMOS devices. DMOS transistors are
used in the output stage due to the absence of second breakdown.
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