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E-STLC3055N View Datasheet(PDF) - STMicroelectronics

Part Name
Description
Manufacturer
E-STLC3055N Datasheet PDF : 34 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Pin description
2
Pin description
Figure 2. Pin connection (top view)
STLC3055N
D0
D1
D2
PD
GAIN SET
N.C.
N.C.
DET
CKTTX
CTTX1
CTTX2
44 43 42 41 40 39 38 37 36 35 34
1
33
2
32
3
31
4
30
5
29
6
28
7
27
8
26
9
25
10
24
11
23
12 13 14 15 16 17 18 19 20 21 22
CSVR
ILTF
RD
RTH
IREF
RLIM
AGND
CVCC
VPOS
RSENSE
GATE
D00TL488-MOD
Table 2. Pin description
Pin
Function
1
D0 Control Interface: input bit 0.
2
D1 Control Interface: input bit 1.
3
D2 Control interface: input bit 2.
4
PD Power down input. Normally connected to CVCC (or to logic level high).
Control gain interface:
5
Gain SET
6,7,36,
38,39,40,42
NC Not connected.
0 Level Rxgain = 0dB Txgain = -6dB
1 Level Rxgain = +6dB Txgain = -12dB
8
DET Logic interface output of the supervision detector (active low).
9
CKTTX Metering pulse clock input (12 KHz or 16KHz square wave).
10
CTTX1 Metering burst shaping external capacitor.
11
CTTX2 Metering burst shaping external capacitor.
12
RTTX
Metering pulse cancellation buffer output. TTX filter network should be connected to
this point. If not used should be left open.
13
FTTX
Metering pulse buffer input this signal is sent to the line and used to perform TTX
filtering.
4 wire input port (RX input). A 100 kΩ external resistor must be connected to AGND to
14
RX bias the input stage. This signal is referred to AGND. If connected to single supply
CODEC output it must be DC decoupled with proper capacitor.
15
ZAC1 RX buffer output, (the AC impedance is connected from this node to ZAC).
16
ZAC AC impedance synthesis.
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