STE2007DIE2 View Datasheet(PDF) - STMicroelectronics

Part Name

Description

Manufacturer

STE2007DIE2

96 x 68 Single-chip LCD controller/driver

STMicroelectronics 

Electrical characteristics

STE2007

Figure 3. Driver TxData Mode AC timing characteristics

SCLK

Timing A

Timing B

MCU TxData

MCU Data direction

Driver TxData

Command

Tx

Hi±Z

Hi±Z

Rx

Status

Command

Tx

Hi±Z

Timing A

T1

T2

SCLK

MCU TxData

Driver TxData

Driver SDA direction

in

out

!CS

Timing B

T3

T4

SCLK

MCU TxData

D/C

Driver TxData

Driver SDA direction

out

!CS

in

T5

1/2 SCLK 1/2 SCLK

3.5.1 Reset timing

Table 14.

Symbol

trs

trw

trj

Reset timing

Signal

Description

!RES Reset time

!RES Reset low pulse width (for valid reset)

!RES Reset rejection (for noise spike)

Min.

2500

Note: 1 The input signal rise and fall times must be within 10ns.

2 Every timing is specified on the basis of 30% and 70% of VDDI.

Max.

2500

1000

Unit

ns

14/62

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