Electrical specifications
STA335W
3.7
3.7.1
Testing
Functional pin definition
Table 8. Functional pin definition
Pin name Number Logic value
IC status
PWRDN
23
TWARN
20
EAPD
19
0
Low consumption
1
Normal operation
0
A temperature warning is indicated by the external power
stage
1
Normal operation
0
Low consumption for power stage
All internal regulators are switched off
1
Normal operation
Figure 5. Test circuit 1
OUTxY
Vcc
Low current dead time = MAX(DTr, DTf)
+Vcc
Duty cycle = 50%
INxY
M58
M57
OUTxY
gnd
(3/4)Vcc
(1/2)Vcc
(1/4)Vcc
t
DTr
DTf
R8Ω
+-
V67
vdc = Vcc/2
Figure 6.
Test circuit 2
High Current Dead time for Bridge application = ABS(DTout(A)-DTin(A))+ABS(DTOUT(B)-DTin(B))
+VCC
Duty cycle=A
DTin(A)
INA
DTout(A)
M58
Q1
Q2
M64
OUTA
Rload=4Ω
DTout(B)
OUTB
L67 10μ
Iout=1.5A
L68 10μ
Iout=1.5A
M57
Q3
C69
470nF
C71 470nF
C70
470nF
Q4
M63
Duty cycle=B
DTin(B)
INB
Duty cycle A and B: Fixed to have DC output current of 4A in the direction shown in figure
D06AU1651
12/43