STA335W
3.6
Power on/off sequence
Figure 3.
Power-on sequence
Note: no specific VCC and
VDD_DIG turn−on sequence
is required
VCC
VDD_Dig
Don’t care
Electrical specifications
Note:
Note:
XTI
Reset
Don’t care
TR
TC
I2C
Don’t care
CMD0 CMD1 CMD2
PWDN
TR = minimum time between XTI master clock stable and Reset removal: 1 msec
TC = minimum time between Reset removal and I2C program, sequence start: 1msec
clock stable means: fmax - fmin < 1 MHz
see Chapter 5.2.3: Serial data first bit, for additional info.
Figure 4. Power-off sequence for pop-free turn-off
Note: no specific VCC and
VDD_DIG turn−off sequence
is required
VCC
VDD_Dig
Don’t care
XTI
Soft Mute
Reg. 0x07
Data 0xFE
Soft EAPD
Reg. 0x05
Bit 7 = 0
Don’t care
FE
Don’t care
Don’t care
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