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ST72324 View Datasheet(PDF) - STMicroelectronics

Part NameDescriptionManufacturer
ST72324 5V RANGE 8-BIT MCU WITH 8 TO 32K FLASH, 10-BIT ADC, 4 TIMERS, SPI, SCI INTERFACE ST-Microelectronics
STMicroelectronics ST-Microelectronics
ST72324 Datasheet PDF : 163 Pages
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ST72324
INTERRUPTS (Cont’d)
Table 8. Interrupt Mapping
Source
Block
Description
RESET Reset
TRAP
Software interrupt
0
Not used
1
MCC/RTC Main clock controller time base interrupt
2
ei0
External interrupt port A3..0
3
ei1
External interrupt port F2..0
4
ei2
External interrupt port B3..0
5
ei3
External interrupt port B7..4
6
Not used
7
SPI
SPI peripheral interrupts
8
TIMER A TIMER A peripheral interrupts
9
TIMER B TIMER B peripheral interrupts
10
SCI
SCI Peripheral interrupts
11
AVD
Auxiliary Voltage detector interrupt
Register
Label
N/A
MCCSR
N/A
SPICSR
TASR
TBSR
SCISR
SICSR
Exit
Priority
Order
from
HALT/
ACTIVE
HALT1)
Address
Vector
yes FFFEh-FFFFh
no FFFCh-FFFDh
FFFAh-FFFBh
Higher yes
Priority yes
FFF8h-FFF9h
FFF6h-FFF7h
yes FFF4h-FFF5h
yes FFF2h-FFF3h
yes FFF0h-FFF1h
FFEEh-FFEFh
yes FFECh-FFEDh
no FFEAh-FFEBh
no FFE8h-FFE9h
Lower no
Priority no
FFE6h-FFE7h
FFE4h-FFE5h
Notes:
1. In Flash devices only a RESET or MCC/RTC interrupt can be used to wake-up from Active Halt mode.
7.6 EXTERNAL INTERRUPTS
7.6.1 I/O Port Interrupt Sensitivity
The external interrupt sensitivity is controlled by
the IPA, IPB and ISxx bits of the EICR register
(Figure 21). This control allows to have up to 4 fully
independent external interrupt source sensitivities.
Each external interrupt source can be generated
on four (or five) different events on the pin:
Falling edge
Rising edge
Falling and rising edge
Falling edge and low level
Rising edge and high level (only for ei0 and ei2)
To guarantee correct functionality, the sensitivity
bits in the EICR register can be modified only
when the I1 and I0 bits of the CC register are both
set to 1 (level 3). This means that interrupts must
be disabled before changing sensitivity.
The pending interrupts are cleared by writing a dif-
ferent value in the ISx[1:0], IPA or IPB bits of the
EICR.
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