M4640-19 View Datasheet(PDF) - Conexant Systems

Part Name

Description

Manufacturer

M4640-19

Baseband Processor for GSM Applications

Conexant Systems 

Baseband Processor

M46

Address

(Hex)

0040000

0040002

0040004

0040006

0040008

004000A

0040080

0040082

0040084

0040086

0040088

004008A

004008C

004008E

0040090

0040092

0040094

0040096

0040098

004009A

0040110

0040114

0040118

004011C

0040120

0040124

0040128

Block Size

(bytes)

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

2

4

4

4

4

4

4

4

Table 2. BP Register Addresses (1 of 6)

Type

Name

Function

Chip Select Configuration Registers

R/W SIU Configuration

Bit [15] controls the polarity of the byte select

signals

R/W CS0 Configuration

Control register for configuration of CS0 signal

R/W CS1 Configuration

Control register for configuration of CS1 signal

R/W CS2 Configuration

Control register for configuration of CS2 signal

R/W CS3 Configuration

Control register for configuration of CS3 signal

R/W CS4 Configuration

Control register for configuration of CS4 signal

Real-Time Clock

R/W RTC Seconds

Real-Time Clock seconds

R/W RTC Minutes

Real-Time Clock minutes

R/W RTC Hours

Real-Time Clock hours

R/W RTC Days

Real-Time Clock days

R/W RTC Months

Real-Time Clock months

R/W RTC Years

Real-Time Clock years

R/W RTC Control

Control of the Real-Time Clock operation

Reserved

Reserved

R/W Alarm Minutes

Alarm minutes

R/W Alarm Hours

Alarm hours

R/W Alarm Days

Alarm days

R/W Alarm Months

Alarm months

R/W Alarm Years

Alarm years

Interrupt Controller

R/W Interrupt Pending

Reading gives interrupts that are pending.

R/W Interrupt Select

Directs a given interrupt to the IRQ or the FIQ input

to the ARM.

R/W Interrupt Enable

Enables the corresponding interrupt source.

R/W External Interrupt Polarity

Set the polarity of external interrupts.

Reserved

R

FIQ Interrupt

Determine if a particular interrupt is generating an

FIQ interrupt to the ARM.

R

IRQ Interrupt

Determine if a particular interrupt is generating an

IRQ interrupt to the ARM.

Default Value

(Hex)

0002

0005

000E

000E

000E

000E

Undefined

Undefined

Undefined

Undefined

Undefined

Undefined

Undefined

Undefined

Undefined

Undefined

Undefined

Undefined

0000 0000

0000 0000

0000 0000

0000 0000

0000 0000

0000 0000

100779C

Conexant

Proprietary Information and Specifications are Subject to Change

7

June 14, 2000

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