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M4640-19 View Datasheet(PDF) - Conexant Systems

Part NameDescriptionManufacturer
M4640-19 Baseband Processor for GSM Applications Conexant
Conexant Systems Conexant
M4640-19 Datasheet PDF : 47 Pages
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Baseband Processor
15:7 N/A
Correct detection
4:3 Parity
Word length
Second character detected
First character detected
Table 19. Autobaud Status Register Functions
1 = start bit detected and character sequence detection in progress. Bit = 0 at any other time
0 = start bit detected
1 = Autobaud detection completed successfully
00 = parity detected as no parity
01 = parity detected as even parity
10 = parity detected as odd parity
11 = Invalid
0 = word length successfully detected as seven bits
1 = word length successfully detected as eight bits
0 = start bit falling edge detected
1 = second character successfully compared with the set of possible characters (“t,” “T,” “/”)
0 = start bit falling edge detected
1 = first character successfully compared with the set of possible characters (“a,” “A,” etc.)
Table 20. Failure Register Functions
Failure Mode
15:9 Reserved
No previous word/parity
“At/aT” error
Second character stop bit error
Second character match error
Second character start bit error
First character stop bit error
First character match error
Baud counter overflow
Start bit too short
There are eight Decision Value Registers and eight Timer Value
Registers. The Decision Value Registers are programmed to set
the lower and upper cycle count thresholds for eight different
baud rates. There is a threshold overlap in that the upper cycle
count threshold for one baud rate is also the lower cycle count
threshold for the next higher baud rate. For each baud rate there
is a value programmed in one of the Timer Value Registers. The
value programmed is the actual value that would be written to
the SDS Divider Registers if the Autobaud circuit detected that
particular baud rate.
When the Autobaud circuit has counted the number of 3.9 MHz
clock cycles in the start bit, it then compares this number of
counts with values in the Decision Value Registers. If it detects
that the number of counts lies between two threshold values set
by the registers, then the contents of the corresponding Timer
Value Register are written to the SDS Port Divider Registers to
set the port transmit and receive baud rate.
For the Decision Value Registers, bits[10:0] set the count
thresholds. Bits[15:11] are unused. For the Timer Value
Registers, bits[15:0] are programmed with the value to be
written to the SDS Divider Registers.
Baud Count Register. The Baud Count Register stores the
number of 3.9 MHz cycles that the Autobaud circuit has counted
in the start bit received on the SDS Rx line.
Proprietary Information and Specifications are Subject to Change
June 14, 2000
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