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M4640-19 View Datasheet(PDF) - Conexant Systems

Part NameDescriptionManufacturer
M4640-19 Baseband Processor for GSM Applications Conexant
Conexant Systems Conexant
M4640-19 Datasheet PDF : 47 Pages
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Baseband Processor
15:5 N/A
SDS port loopback enable
Autobaud detection flag
Failure interrupt enable
Autobaud enable
Table 18. Autobaud Control Register Functions
Status of this bit indicates whether or not the Autobaud circuit will attempt to disable the hardware
loopback in the SDS port on successful detection of an AT sequence.
0 = do not attempt disable of hardware loopback
1 = attempt disable of hardware loopback
This bit will be set to “1” whenever a correct Autobaud detection has taken place. The bit can only be
cleared by the ARM.
Enable interrupt to the ARM if a failure is detected:
0 = off
1 = on
Enable the Autobaud function:
0 = off
1 = on
Character Combinations. The following character
combinations can be detected:
The detection circuit allows for successive “a” or “A” characters
to be received (e.g., “aat” and aAT” are also valid combinations).
Data Formatting. The following data formats can be detected:
7-bit data, no parity, 2 stop bits
7-bit data, even parity, 1 stop bit
7-bit data, odd parity, 1 stop bit
8-bit data, no parity, 1 stop bit
Autobaud Registers__________________________________
The Autobaud registers are used to configure and monitor the
Autobaud function. The address and default values for the
Autobaud registers are specified in Table 2.
Autobaud Control Register. The Autobaud Control Register is
used to control the operation of the Autobaud function. The
function of each of the bits in this register is described in
Table 18.
Autobaud Status Register. The Autobaud Status Register is
used to provide the current status of the Autobaud function. The
function of each of the bits in this register is described in
Table 19. This register is read only.
Failure Register. The Failure Register is used to detect
Autobaud failures. If the Autobaud detection fails, one of the bits
in the Failure Register will be set to “1.” The bit that is set
depends on the failure mode. Bits [8:0] in this register are
cleared to “0” when the start bit is detected. If the Failure
Interrupt Enable bit in the Control Register is set to “1,” an
interrupt to the ARM is generated when any of these bits is set.
The function of each of the bits in this register is described in
Table 20.
First Character/Second Character Register. Bits [7:0] store
the first character detected during the last Autobaud attempt.
Bits [15:8] store the second character detected during the last
Autobaud attempt.
Temporary Character Register. When the Autobaud circuit
processes an incoming character, the character bits are stored
in this register. If the Autobaud function fails, the actual bits
received can be read from this register.
Decision Value/Timer Value Registers. The Decision
Value/Timer Value Registers are used to determine the baud
rate of the incoming data stream by counting the number of 3.9
MHz clock cycles in the start bit. The start bit is a “0” and the
first bit of the “A” or “a” character is a “1.”
Therefore, the duration of the start bit can be measured by
counting the number of clock cycles for which the SDS_RX
signal is low. Based on the number of clock cycles counted, the
Autobaud circuit decides what the baud rate is and programs
the SDS baud rate accordingly.
June 14, 2000
Proprietary Information and Specifications are Subject to Change
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