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M46 View Datasheet(PDF) - Conexant Systems

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Description
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M46 Datasheet PDF : 47 Pages
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M46
Baseband Processor
Table 11. Serial Port Status Register Functions
Bit
Function
0
Serial in, buffer is full:
1 = received character has been loaded into the Serial In buffer and can be read.
This bit is reset to “0” when the buffer is read.
1
Overrun error:
1 = data in the Serial In buffer was not read before the next received character was transferred into the register,
overwriting the previous data.
This bit is reset to “0” when the Serial In buffer is read and the next character received can be safely transferred into the buffer.
2
Parity error:
1 = parity error detected in the serial in data.
This bit is reset to “0” when a character with a correct parity bit is received.
3
Framing error:
1 = received word does not have a valid stop bit.
This bit is reset to “0” when a character with a valid stop bit is detected.
4
Break interrupt:
1 = serial in data is logic 0 from the start bit to the first stop bit.
This bit is reset to “0” when a logic 1 is detected on the serial input.
5
Serial Out buffer empty:
1 = serial Out buffer is ready to accept a new character for transmission. If bit [1] of the Serial Port Interrupt Register is
also set to 1, the port transmit interrupt will be asserted.
This bit is reset to “0” by a write to the Serial Out buffer.
6
Serial out underrun:
1 = the Serial Out Register is empty and the Serial Out buffer has not been reloaded. Serial Out data will be set to logic
1 if this occurs.
This bit is reset to “0” by a write to the Serial Out buffer.
7
Received data parity bit is copied to this location.
Table 12. Serial Port Form Register Stop Bit Lengths
Bits
Duration of Final Stop Bit
[1:0]
(5-bit word length, 2 stop bit mode)
00
1/2 bit period
01
1/4 bit period
10
3/8 bit period
11
1/8 bit period
Duration of Final Stop Bit For All
Other Modes
1-bit period
3/4 bit period
7/8 bit period
5/8 bit period
20
June 14, 2000
Conexant
Proprietary Information and Specifications are Subject to Change
100779C
 

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