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M4640-19 View Datasheet(PDF) - Conexant Systems

Part NameDescriptionManufacturer
M4640-19 Baseband Processor for GSM Applications Conexant
Conexant Systems Conexant
M4640-19 Datasheet PDF : 47 Pages
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Baseband Processor
M46
Table 9. Serial Port Interrupt Register Functions
Bit
Function
7
Serial In Status Interrupt flag. This flag is set to “1” if either of the following two conditions
occurs:
1. Any of bits [3:1] in the Serial Port Status Register are set to “1.”
2. Bit [4] of the Serial Port Status Register changes state.
6
Reserved
5
Reserved
4
Reserved
3
Reserved
2
Enable/disable generation of the port receive interrupt if bit [7] of this register is set to 1:
0 = disabled
1 = enabled
1
Enable/disable generation of the port transmit interrupt when the output buffer is empty:
0 = disabled
1 = enabled
0
Enable/disable generation of the port receive interrupt when the input buffer is full:
0 = disabled
1 = enabled
Table 10. Serial Port Line Register Functions
Bit
Function
7
Parity stuff. Output as the transmit data parity bit when bit [3] and bit [1] are set to “1.”
6
Set break:
1 = break condition is transmitted (i.e., the output data is forced to a logic 0 state.
0 = Normal operation.
5
Parity stuff enable:
1 = Parity stuff enabled (bit [7] inserted in the serial out data in the position of the parity bit).
0 = Parity stuff disabled.
4
Even parity select:
1 = even parity enabled (even parity bit will be inserted in transmit data stream if bit 3 = “1”
and bit 5 =” 0.”
0 = even parity disabled.
3
Enable parity:
1 = parity bit inserted in serial out data; serial in data checked for parity bit.
0 = parity bit not inserted in serial out data; serial in data not checked for parity bit.
2
Number of stop bits to be inserted into the serial out data stream:
1 = 2 stop bits
0 = 1 stop bit
1:0 Word length. Specifies the number of bits in each serial in and serial data out word:
00 = 5 bits
01 = 6 bits
10 = 7 bits
11 = 8 bits
100779C
Conexant
Proprietary Information and Specifications are Subject to Change
19
June 14, 2000
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