DatasheetQ Logo
Electronic component search and free download site.
Transistors,MosFET ,Diode,Integrated circuits

28233-11 View Datasheet(PDF) - Conexant Systems

Part Name
Description
Manufacturer
28233-11 Datasheet PDF : 161 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
CN8223
ATM Transmitter/Receiver with UTOPIA Interface
The CN8223 ATM Transmitter/Receiver with UTOPIA Level 1 interface provides a
single-access ATM service termination for User-to-Network (UNI) and
Network-to-Network Interfacing (NNI) in conformance with ATM Forum UNI and NNI
Specification 94/0317; Bellcore Specifications TR-TSV-000772, TR-TSV-000773,
TR-NWT-000253, and T1S1/92-185; ITU Recommendations I.432, G.707, G.751,
G.832, and Q.921; and ETSI prETS 300 213 and 300 214. Both Customer Premise
Equipment (CPE) and switching system interface functions are provided. The CN8223
provides DS1, E1, DS3, E3, E4, STS-1, and STS-3c (and STM-1) ATM cell alignment
functions. The system interface is via a parallel FIFO port or UTOPIA interface. In
addition, the CN8223 terminates the operations and maintenance flows F1, F2, and F3.
The CN8223 provides four FIFO port interfaces and one UTOPIA interface. Each
receiver port can be programmed with a particular Virtual Channel Identifier/Virtual
Path Identifier (VCI/VPI) address for message routing. VCI/VPI pages can also be
selected via masking registers.
The microprocessor can set control registers for insertion of selected header fields
by the transmitter on an individual port basis. The microprocessor can also control
insertion of all overhead and can insert errors in selected fields for test equipment
applications.
Functional Block Diagram
8
Data
Bus 8
Port
Control
UTOPIA
or FIFO
Interface
Microprocessor Microprocessor
Address
Data
Line Overhead
Cell
FIFO
8
7
8 16
4-Port
FIFO
Interface
Microprocessor
Interface
52 Control Registers
28 Status Registors
HDLC
Data
Link
8
Cell
Generation
TX
Rate 8
Control
Cell
Alignment
Header
Filter
Cell
Validation
HEC or
8 PLCP
8
Framers 1
DS3
E3 (G.751)
E3 (G.832)
STS-1
E4 (G.832)
ATM
UNI
STS-3c 1
STM-1
TAXI
8
ATM Layer
Physical Framing
Distinguishing Features
• Integrates 7 line framers with ATM
layer processing according to ATM
Forum UNI and NNI Specifications
• UTOPIA Level 1 interface
• Internal framers for DS3, E3 (G.751,
G.832), E4 (G.832), STS-1, STS-3c,
STM-1
• PLCP and G.804 HEC cell alignment
for all data rates from 1.544 Mbps to
155 Mbps
• Direct interface to TAXITM or external
T1/E1 framers
• ATM and SMDS cell modes
• 4 FIFO ports with header screening,
formatting, and transmit priority
controls
• Idle cells generated and screened
• Statistics counts latched on
one-second intervals
• Error detection and insertion
• Option insertion or generation of all
line and cell overhead
• Serial or parallel line interface
• Available evaluation module
reference design and software
• Supports Automatic Protection
Switching (APS)
Applications
• WAN equipment
• ATM switches
• Test equipment
• ATM routers and hub
Data Sheet
100046C
March 8, 2000
 

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]