OM5730 View Datasheet(PDF) - Philips Electronics

Part Name

Description

Manufacturer

OM5730

STB5860 (Set-Top Box) STB concept

Philips Electronics 

Philips Semiconductors

STB5860 (Set-Top Box) STB concept

Preliminary specification

OM5730

4 HARDWARE

4.1 IC list

Table 1 Description of system ICs

HARDWARE

DESCRIPTION

Channel module

SD1288MK2 tuner

TDA8044 satellite demodulator and decoder

Front panel board

87C524

microprocessor

Main board

SAA7219

descrambler; demultiplexer and MIPS

core

SAA7215

audio; video; graphics and digital

encoder

PDI1394L11 link and physical layer of 1394

PDI1394P11 link and physical layer of 1394

UDA1320 audio DAC

TDA8004 smart card interface

4.2 Main board

4.2.1 SAA7219

The SAA7219 (TMIPS) is a CPU for MPEG2 stream

transport; it includes a MIPS R3000 microcontroller core

and several peripheral interfaces such as UARTs, I2C-bus

units, an IEEE 1394, and an IEEE 1284 (Centronics)

interface.

The SAA7219 receives transport streams through a

versatile stream input interface capable of handling both

byte-parallel and bit-serial streams, in various formats,

supporting data streams up to and including 13.5 Mbytes/s

(108 Mbits/s). The stream data is first applied to an on-chip

descrambler incorporating DVB descrambling algorithms,

on the basis of 6 control word pairs stored in on-chip RAM.

Demultiplexing is subsequently applied to the stream, to

separate up to 40 individual data streams.

The demultiplexer section includes clock recovery and

timebase management.

Program Specific Information (PSI), Service

Information (SI), Conditional Access (CA) messages and

private data is selected and stored in external memory, for

subsequent off-line processing by the internal R3000

microcontroller core.

4.2.2 SAA7215

Table 2 SAA7215 family

TYPE NUMBER MACROVISION

SECAM

SAA7215HS/C2 no

no

SAA7216HS/C1 yes

no

SAA7221HS/C1 no

yes

The SAA7215 is a MPEG2 source decoder which

combines audio decoding and video decoding.

Additionally to these basic MPEG functions it also provides

means for enhanced graphics, background display and/or

on-screen display as well as encoding of output video.

Due to an optimized architecture for audio and video

decoding, maximum capacity in external memory and

processing power from the external CPU is available for

graphic support.

4.3 Front-end

The front-end allows reception of channels transmitted by

satellite received via a satellite dish in combination with a

LNB. The outdoor unit can be controlled with:

• OFF/14 V/18 V pouring for polarisation steering

• 22 kHz tone switching control for band switching

• Digital Satellite Equipment Control (DiSEqC) V1.0.

4.4 Front panel

4.4.1 LNB INTERFACE

Master transmitter DiSEqC control is provided and 14/18 V

switching is routed through the digital board to the

front-end utility connector. The possibility to disable the

DiSEqC on the front panel, allows for the next generation

QPSK front-end which will have DiSEqC control.

4.4.2 IR

The on-board microcontroller decodes the IR commands

in RC5/6 format and relays via the serial link to the

SAA7219.

4.4.3 KEYS

STANDBY, UP, DOWN, LEFT, RIGHT, OK and MENU

4.4.4 SCART CONTROL

Pin 8 control as per the SCART specification for 16 × 9

and 4 × 3.

1999 Aug 25

10

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