80296SA COMMERCIAL CHMOS 16-BIT MICROCONTROLLER
Table 10. AC Characteristics the 80C296SA Will Meet, Demultiplexed Bus Mode (Continued)
Symbol
Parameter
Min
Max
Units
TWHBX
BHE#, INST Hold after WR# Rising Edge
0
ns
TWHAX
A19:0, CSx# Hold after WR# Rising Edge
0
ns
TRHBX
BHE#, INST Hold after RD# Rising Edge
0
ns
TRHAX
A19:0, CSx# Hold after RD# Rising Edge
0
ns
NOTES:
1. 25 MHz is the maximum input frequency when using an external crystal oscillator; however, 50 MHz
can be applied with an external clock source.
2. When the phase-locked loop (PLL) circuitry is enabled, the minimum input frequency on XTAL1 is 8
MHz. The PLL cannot be run at frequencies lower than 16 MHz.
3. If using either READY or BUSCONx to insert wait states, add 2t × n, where n = number of wait states.
4. Assuming back-to-back bus cycles.
Table 11. AC Characteristics the External Memory System Must Meet, Demultiplexed Bus Mode
Symbol
Parameter
Min
Max
Units
TAVDV
TRLDV
TSLDV
TCHDV
TRHDZ
TRXDX
TAVYV
TCH1YX
TCH2YX
TYLYH
A19:0 Valid to Input Data Valid
RD# Active to Input Data Valid
Chip Select Low to Data Valid
CLKOUT High to Input Data Valid
End of RD# to Input Data Float
Data Hold after RD# Inactive
A19:0 Valid to READY Setup
First READY Hold (active) after CLKOUT High
Non-first READY Hold (active) after CLKOUT High
Non READY (inactive) Time
4t – 28 ns (1, 2, 3)
3t – 25 ns (1, 2)
4t – 28 ns (1, 2, 3)
2t – 25
ns
t
ns (2, 3)
0
ns
3t – 45 ns (4)
t–4
2t – 21 ns (5, 6)
0
2t – 21 ns (5)
2t
No Upper
Limit
ns
NOTES:
1. If using the READY signal to insert wait states, you must program at least one wait state in the
BUSCONx register because the first falling edge of READY is not synchronized with a CLKOUT edge.
2. If using the BUSCONx register without the READY signal to insert wait states, add 2t × n, where n =
number of wait states.
3. If CSx# changes or if a write cycle follows a read cycle, add 2t (1 state).
4. If using the BUSCONx register to insert wait states, add (2t × n–1), where n = number of wait states.
5. Exceeding the maximum specification causes additional wait states.
6. If you program two or more wait states in the BUSCONx register, the TCH1YX minimum does not apply.
PRELIMINARY
25