RT8223P View Datasheet(PDF) - Richtek Technology
Part Name
Description
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RT8223P Datasheet PDF : 23 Pages
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RT8223P
Forced CCM Mode (SKIPSEL = REF)
The low noise, Forced CCM mode (SKIPSEL = REF)
disables the zero-crossing comparator, which controls the
low side switch on-time. This causes the low side gate-
driver waveform to become the complement of the high
side gate-driver waveform. This in turn causes the inductor
current to reverse at light loads as the PWM loop to
maintain a duty ratio of VOUT/VIN. The benefit of Forced
CCM Mode is to keep the switching frequency fairly
constant, but it comes at a cost. The no load battery
current can be from 10mA to 40mA, depending on the
external MOSFETs.
Reference and linear Regulators (REF, VREGx)
The 2V reference (REF) is accurate within ±1% over the
entire operating temperature range, making REF useful
as a precision system reference. Bypass REF to GND
with a minimum 0.22μF ceramic capacitor. REF can supply
up to 100μA for external loads. Loading REF reduces the
VOUTx output voltage slightly because of the reference
load-regulation error.
The RT8223P includes 5V (VREG5) and 3.3V (VREG3)
linear regulators. The VREG5 regulator supplies a total of
100mA for internal and external loads, including the
MOSFET gate driver and PWM controller. The VREG3
regulator supplies up to 100mA for external loads. Bypass
VREG5 and VREG3 with a minimum 4.7μF ceramic
capacitor.
When the 5V main output voltage is above the VREG5
switch over threshold (4.75V), an internal 1.5Ω P-Channel
MOSFET switch connects VOUT1 to VREG5, while
simultaneously shutting down the VREG5 linear regulator.
Similarly, when the 3.3V main output voltage is above the
VREG3 switch over threshold (3.125V), an internal 1.5Ω
P-Channel MOSFET switch connects VOUT2 to VREG3,
while simultaneously shutting down the VREG3 linear
regulator. It can decrease the power dissipation from the
same battery, because the converted efficiency of SMPS
is better than the converted efficiency of the linear
regulator.
Current-Limit Setting (ENTRIPx)
The RT8223P has a cycle-by-cycle current-limit control.
The current-limit circuit employs an unique “valley” current
sensing algorithm. If the magnitude of the current sense
signal at PHASEx is above the current-limit threshold, the
PWM is not allowed to initiate a new cycle (Figure 2).
The actual peak current is greater than the current-limit
threshold by an amount equal to the inductor ripple current.
Therefore, the exact current-limit characteristic and
maximum load capability are functions of the sense
resistance, inductor value, and battery and output voltage.
IL
IL, PEAK
ILOAD
ILIM
0
t
Figure 2. “Valley” Current-Limit
The RT8223P uses the on-resistance of the synchronous
rectifier as the current-sense element and supports
temperature compensated MOSFET RDS(ON) sensing. The
RILIMX resistor between the ENTRIPX pin and GND sets
the current-limit threshold. The resistor RILIMX is connected
to a current source from ENTRIPx, which is 10μA typically
at room temperature. The current source has a 4700ppm/
°C temperature slope to compensate the temperature
dependency of the RDS(ON). When the voltage drop across
the sense resistor or low side MOSFET equals 1/10 the
voltage across the RILIMX resistor, positive current limit
will be activated. The high side MOSFET will not be turned
on until the voltage drop across the MOSFET falls below
1/10 the voltage across the RILIMX resistor.
Choose a current limit resistor by following equations
VILIMx = (RILIMx x10μA)/10 = IILIMx x RDS(ON)
RILIMx = (IILIMx x RDS(ON)) x 10/10μA
Carefully observe the PC board layout guidelines to ensure
that noise and DC errors do not corrupt the current-sense
signal at PHASEx and GND. Mount or place the IC close
to the low side MOSFET.
MOSFET Gate Driver (UGATEx, LGATEx)
The high side driver is designed to drive high-current, low
RDS(ON) N-MOSFET(s). When configured as a floating driver,
a 5V bias voltage is delivered from the VREG5 supply.
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DS8223P-01 June 2011
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