STK1743 View Datasheet(PDF) - Simtek Corporation

Part Name

Description

Manufacturer

STK1743

nvTime™ 8K x 8 AutoStore™ nvSRAM with Real-Time Clock

Simtek Corporation 

STK1743

nvTime™

8K x 8 AutoStore™ nvSRAM

with Real-Time Clock

FEATURES

• Data Integrity of Simtek nvSRAM Combined

with Full-Featured Real-Time Clock

• Stand-Alone Nonvolatile Memory and Time-

Keeping Solution—No Other Parts Required

• No Batteries to Fail

• Fast 25ns, 35ns and 45ns Access Times

• Software- and AutoStore™-Controlled

Nonvolatile Cycles

• Year 2000 Compliant with Leap Year

Compensation

• 24-Hour BCD Format

• 100-Year Data Retention over Full Industrial

Temperature Range

• Full 30-Day RTC Operation on Each Power

Loss

• Single 5V ± 10% Power Supply

DESCRIPTION

ADVANCE

The Simtek STK1743 DIP module houses 64Kb of

nonvolatile static RAM, a real-time clock (RTC) with

crystal and a high-value capacitor to support sys-

tems that require high reliability and ease of manu-

facturing. READ and WRITE access to all RTC

functions and the memory is the same as a conven-

tional x 8 SRAM. The highest eight addresses of the

RAM support clock registers for centuries, years,

months, dates, days, hours, minutes and seconds.

Independent data resides in the integral EEPROM at

all times. Automatic RECALL on power up transfers

the EEPROM data to the SRAM, while an automatic

STORE on power down transfers SRAM data to the

EEPROM. A software RECALL and STORE are also

possible on user command. nvTime™ allows unlim-

ited accesses to SRAM, unlimited RECALLs and 106

STOREs.

BLOCK DIAGRAM

EEPROM ARRAY

128 x 512

A5

A6

STORE

A7

STATIC RAM

A8

ARRAY

RECALL

A9

128 x 512

A11

A12

VCC

STORE/

RECALL

CONTROL

POWER

CONTROL

SOFTWARE

DETECT

A0 - A12

PIN CONFIGURATIONS

NC 1

A12 2

A7 3

A6 4

A5 5

A4 6

A3 7

A2 8

A1 9

A0 10

DQ0 11

DQ1 12

DQ2 13

VSS 14

28 VCC

27 W

26 NC

25 A8

24 A9

23 A11

22 G

21 A10

20 E

19 DQ7

18 DQ6

17 DQ5

16 DQ4

15 DQ3

600 mil

Dual

In-Line

Module

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

COLUMN I/O

COLUMN DEC

A0 A1 A2 A3 A4 A10

RTC

MUX

A0 -

A12

PIN NAMES

A0 - A12

W

Address Inputs

Write Enable

DQ0 - DQ7

Data In/Out

E

G

G

Chip Enable

Output Enable

E

VCC

Power (+ 5V)

W

VSS

Ground

March 1999

7-1

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