PSD804F2V-B-70J View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
PSD804F2V-B-70J Datasheet PDF : 110 Pages
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PSD835G2
8.0
Register Bit
Definition
(cont.)
PSD8XX Family
Input Micro⇔Cells – Ports A, B and C
Bit 7
Bit 6
Bit 5
Bit 4
IMcell7
IMcell6
IMcell5
IMcell4
Bit 3
IMcell3
Bit 2
IMcell2
Bit 1
IMcell1
Bit 0
IMcell0
Bit definitions: Read Only Registers
Read Input Micro⇔Cell[7:0] status on Ports A, B and C.
Output Micro⇔Cells A Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Mcella7 Mcella6 Mcella5 Mcella4 Mcella3
Bit 2
Mcella2
Bit 1
Mcella1
Bit 0
Mcella0
Bit definitions:
Write Register: Load Micro⇔CellA[7:0] with 0 or 1.
Read Register: Read Micro⇔CellA[7:0] output status.
Output Micro⇔Cells B Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Mcellb7 Mcellb6 Mcellb5 Mcellb4 Mcellb3
Bit 2
Mcellb2
Bit 1
Mcellb1
Bit 0
Mcellb0
Bit definitions:
Write Register: Load Micro⇔CellB[7:0] with 0 or 1.
Read Register: Read Micro⇔CellB[7:0] output status.
Mask Micro⇔Cells A Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Mcella7 Mcella6 Mcella5 Mcella4 Mcella3
Bit 2
Mcella2
Bit 1
Mcella1
Bit 0
Mcella0
Bit definitions:
Register Bit <j> to 0 = allow Micro⇔CellA<j> flip flop to be loaded by MCU (default).
Register Bit <j> to 1 = does not allow Micro⇔CellA<j> flip flop to be loaded by MCU.
Mask Micro⇔Cells B Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Mcellb7 Mcellb6 Mcellb5 Mcellb4 Mcellb3 Mcellb2 Mcellb1 Mcellb0
Bit definitions:
Register Bit <j> to 0 = allow Micro⇔CellB<j> flip flop to be loaded by MCU (default).
Register Bit <j> to 1 = does not allow Micro⇔CellB<j> flip flop to be loaded by MCU.
Flash Protection Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Sec7_Prot Sec6_Prot Sec5_Prot Sec4_Prot Sec3_Prot Sec2_Prot Sec1_Prot Sec0_Prot
Bit definitions: Read Only Register
Sec<i>_Prot 1 = Flash Sector <i> is write protected.
Sec<i>_Prot 0 = Flash Sector <i> is not write protected.
Flash Boot Protection Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Security_Bit
*
*
*
Sec3_Prot Sec2_Prot Sec1_Prot Sec0_Prot
Bit definitions:
Sec<i>_Prot 1 = Boot Block Sector <i> is write protected.
Sec<i>_Prot 0 = Boot Block Sector <i> is not write protected.
Security_Bit 0 = Security Bit in device has not been set.
1 = Security Bit in device has been set.
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