I/O Ports
(Cont.)
PSD5XX Family
9.3.11 Port A – Functionality and Structure
Port A is the most flexible of all the I/O ports. It can be configured to perform one or more
of the following functions:
t Standard MCU I/O Mode
t PLD I/O
t Address Out – latched address lines assigned to pins PA[0-7]
t Address In – input port for other lines, inputs can be latched by ALE.
t Special Function Out – pins PA0 – PA3 can be configured as dedicated timer outputs.
t Peripheral I/O
Figure 21 shows the structure of a Port A pin. If the pin is configured as an output port, the
multiplexer selects one of its four inputs as output. If the pin is configured as an input, the
input connects to :
1. Data In Register as input in Standard MCU I/O Mode
or
2. PA Macrocell as PLD input
or
3. PA Macrocell as Address In input (latched for multiplexed bus).
9.3.12 Port B – Functionality and Structure
Port B is similar to Port A in structure. It can be configured to perform one or more of the
following functions:
t Standard MCU I/O Mode
t PLD I/O
t Address Out – address lines A[0-7] for 8-bit multiplexed bus, or address lines
A[8-15] for 16-bit multiplexed bus are assigned to pins PB[0-7].
t Special Function Out – pins PB0 - PB3 are configured as dedicated Timer outputs.
Figure 22 shows the structure of a Port B pin. If the pin is configured as an output port, the
multiplexer selects one of its four inputs as output. If the pin is configured as input, the input
connects to :
t Data In Register as input in Standard MCU I/O Mode
or
t PB Macrocell as PLD input
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