E28400CVT80 View Datasheet(PDF) - Intel

Part Name

Description

Manufacturer

E28400CVT80

2-MBIT SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY

Intel 

2-MBIT SmartVoltage BOOT BLOCK FAMILY

E

Separately erasable blocks, including a hardware-

lockable boot block (16,384 bytes), two parameter

blocks (8,192 bytes each) and main blocks (one

block of 98,304 bytes and one block of 131,072

bytes), define the boot block flash family

architecture. See Figures 7 and 8 for memory

maps. Each block can be independently erased and

programmed 100,000 times at commercial

temperature or 10,000 times at extended

temperature.

The boot block is located at either the top (denoted

by -T suffix) or the bottom (-B suffix) of the address

map in order to accommodate different

microprocessor protocols for boot code location.

The hardware-lockable boot block provides

complete code security for the kernel code required

for system initialization. Locking and unlocking of

the boot block is controlled by WP# and/or RP#

(see Section 3.4 for details).

The Command User Interface (CUI) serves as the

interface between the microprocessor or

microcontroller and the internal operation of the

boot block flash memory products. The internal

Write State Machine (WSM) automatically executes

the algorithms and timings necessary for program

and erase operations, including verifications,

thereby unburdening the microprocessor or

microcontroller of these tasks. The Status Register

(SR) indicates the status of the WSM and whether it

successfully completed the desired program or

erase operation.

Program and Erase Automation allows program and

erase operations to be executed using an industry-

standard two-write command sequence to the CUI.

Data programming is performed in word (28F200

family) or byte (28F200 or 28F002B families)

increments. Each byte or word in the flash memory

can be programmed independently of other memory

locations, unlike erases, which erase all locations

within a block simultaneously.

The 2-Mbit SmartVoltage boot block flash memory

family is also designed with an Automatic Power

Savings (APS) feature which minimizes system

battery current drain, allowing for very low power

designs. To provide even greater power savings,

the boot block family includes a deep power-down

mode which minimizes power consumption by

turning most of the flash memory’s circuitry off. This

mode is controlled by the RP# pin and its usage is

discussed in Section 3.5, along with other power

consumption issues.

Additionally, the RP# pin provides protection

against unwanted command writes due to invalid

system bus conditions that may occur during

system reset and power-up/down sequences. For

example, when the flash memory powers-up, it

automatically defaults to the read array mode, but

during a warm system reset, where power

continues uninterrupted to the system components,

the flash memory could remain in a non-read mode,

such as erase. Consequently, the system Reset

signal should be tied to RP# to reset the memory to

normal read mode upon activation of the Reset

signal. See Section 3.6.

The 28F200 provides both byte-wide or word-wide

input/output, which is controlled by the BYTE# pin.

Please see Table 2 and Figure 16 for a detailed

description of BYTE# operations, especially the

usage of the DQ15/A–1 pin.

The 28F200 products are available in a

ROM/EPROM-compatible pinout and housed in the

44-lead PSOP (Plastic Small Outline) package, the

48-lead TSOP (Thin Small Outline, 1.2 mm thick)

package and the 56-lead TSOP as shown in

Figures 4, 5 and 6, respectively. The 28F002

products are available in the 40-lead TSOP

package as shown in Figure 3.

Refer to the DC Characteristics, Section 4.4

(commercial temperature) and Section 4.11

(extended temperature), for complete current and

voltage specifications. Refer to the AC

Characteristics, Section 4.5 (commercial

temperature) and Section 4.12 (extended

temperature), for read, write and erase performance

specifications.

1.3 Applications

The 2-Mbit boot block flash memory family

combines high-density, low-power, high-

performance, cost-effective flash memories with

blocking and hardware protection capabilities. Their

flexibility and versatility reduce costs throughout the

product life cycle. Flash memory is ideal for Just-In-

Time production flow, reducing system inventory

and costs, and eliminating component handling

during the production phase.

When your product is in the end-user’s hands, and

updates or feature enhancements become

necessary, flash memory reduces the update costs

by allowing user-performed code changes instead

of costly product returns or technician calls.

6

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