PIC18LF25J50 View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

PIC18LF25J50

28/44-Pin, Low-Power, High-Performance USB Microcontrollers with nanoWatt XLP Technology

Microchip Technology 

PIC18F46J50 FAMILY

Pin Diagrams (Continued)

44-Pin QFN(1,3,4)

= Pins are up to 5.5V tolerant

RC7/PMA4/RX1/DT1/SDO1/RP18

RD4/PMD4/RP21

RD5/PMD5/RP22

RD6/PMD6/RP23

RD7/PMD7/RP24

VSS

AVDD

VDD

RB0/AN12/INT0/RP3

RB1/AN10/PMBE/RTCC/RP4

RB2/AN8/CTED1/PMA3/VMO/REFO/RP5

1

33

2

32

3

31

4

30

5

29

6

PIC18F4XJ50 28

7

27

8

26

9

25

10

24

11

23

OSC2/CLKO/RA6

OSC1/CLKI/RA7

VSS

AVSS

VDD

AVDD

RE2/AN7/PMCS

RE1/AN6/PMWR

RE0/AN5/PMRD

RA5/AN4/SS1/HLVDIN/RCV/RP2

VDDCORE/VCAP(2)

Legend:

Note 1:

2:

3:

4:

RPn represents remappable pins.

Some input and output functions are routed through the Peripheral Pin Select (PPS) module and can be

dynamically assigned to any of the RPn pins. For a list of the input and output functions, see Table 10-13

and Table 10-14, respectively. For details on configuring the PPS module, see Section 10.7 “Peripheral

Pin Select (PPS)”.

See Section 27.3 “On-Chip Voltage Regulator” for details on how to connect the VDDCORE/VCAP pin.

For the QFN package, it is recommended that the bottom pad be connected to VSS.

On 44-pin QFN devices, AVDD and AVSS reference sources are intended to be externally connected to VDD

and VSS levels. Other package types tie AVDD and AVSS to VDD and VSS internally.

DS39931D-page 6

 2011 Microchip Technology Inc.

Share Link: