PIC16C5X
5.0 RESET
PIC16C5X devices may be RESET in one of the follow-
ing ways:
• Power-On Reset (POR)
• MCLR Reset (normal operation)
• MCLR Wake-up Reset (from SLEEP)
• WDT Reset (normal operation)
• WDT Wake-up Reset (from SLEEP)
Table 5-1 shows these RESET conditions for the PCL
and STATUS registers.
Some registers are not affected in any RESET condi-
tion. Their status is unknown on POR and unchanged
in any other RESET. Most other registers are reset to a
“RESET state” on Power-On Reset (POR), MCLR or
WDT Reset. A MCLR or WDT wake-up from SLEEP
also results in a device RESET, and not a continuation
of operation before SLEEP.
The TO and PD bits (STATUS <4:3>) are set or cleared
depending on the different RESET conditions (Table 5-
1). These bits may be used to determine the nature of
the RESET.
Table 5-3 lists a full description of RESET states of all
registers. Figure 5-1 shows a simplified block diagram
of the On-chip Reset circuit.
TABLE 5-1: STATUS BITS AND THEIR SIGNIFICANCE
Condition
TO
PD
Power-On Reset
1
1
MCLR Reset (normal operation)
u
u
MCLR Wake-up (from SLEEP)
1
0
WDT Reset (normal operation)
0
1
WDT Wake-up (from SLEEP)
0
0
Legend: u = unchanged, x = unknown, — = unimplemented read as '0'.
TABLE 5-2: SUMMARY OF REGISTERS ASSOCIATED WITH RESET
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
03h STATUS PA2
PA1
PA0
TO
PD
Z
DC
C
Legend: u = unchanged, x = unknown, q = see Table 5-1 for possible values.
Value on
POR
Value on
MCLR and
WDT Reset
0001 1xxx 000q quuu
1997-2013 Microchip Technology Inc.
Preliminary
DS30453E-page 19