PCA9501 View Datasheet(PDF) - NXP Semiconductors.

Part Name

Description

Manufacturer

PCA9501

8-bit I2C-bus and SMBus I/O port with interrupt, 2-kbit EEPROM and 6 address pins

NXP Semiconductors. 

NXP Semiconductors

PCA9501

8-bit I2C-bus and SMBus I/O port with interrupt, 2-kbit EEPROM

7. Functional description

Refer also to Figure 1 “Block diagram of PCA9501”.

write pulse

data from shift register

power-on reset

read pulse

data to shift register

DQ

FF

CI

S

DQ

FF

CI

S

Fig 5. Simplified schematic diagram of each I/O

100 µA

VDD

IO0 to IO7

VSS

to interrupt logic

002aac001

7.1 Device addressing

Following a START condition, the bus master must output the address of the slave it is

accessing. The address of the PCA9501 is shown in Figure 6. Internal pull-up resistors

are incorporated on the hardware-selectable address pins.

The last bit of the address byte defines the operation to be performed. When set to logic 1

a read is selected, while a logic 0 selects a write operation.

slave address

slave address

0 A5 A4 A3 A2 A1 A0 R/W

1 A5 A4 A3 A2 A1 A0 R/W

fixed

hardware programmable

002aac002

a. I/O expander

Fig 6. PCA9501 slave addresses

fixed

hardware programmable

002aac003

b. Memory

Remark: Reserved I2C-bus addresses must be used with caution since they can interfere

with:

• Reserved for future use I2C-bus addresses (0000 011, 1111 1xx)

• Slave devices that use the 10-bit addressing scheme (1111 0xx)

• Slave devices that are designed to respond to the General Call address (0000 000)

• Hs-mode master code (0000 1xx)

PCA9501_4

Product data sheet

Rev. 04 — 10 February 2009

© NXP B.V. 2009. All rights reserved.

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