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PCA9500BS View Datasheet(PDF) - NXP Semiconductors.

Part Name
Description
Manufacturer
PCA9500BS Datasheet PDF : 26 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
NXP Semiconductors
PCA9500
8-bit I2C-bus and SMBus I/O port with 2-kbit EEPROM
terminal 1
index area
A2 1
IO0 2
IO1 3
IO2 4
PCA9500BS
12 SCL
11 WC
10 IO7
9 IO6
Transparent top view
Fig 4. Pin configuration for HVQFN16
002aae584
6.2 Pin description
Table 3.
Symbol
A0
A1
A2
IO0
IO1
IO2
IO3
IO4
IO5
IO6
IO7
VSS
WC
SCL
SDA
VDD
Pin description
Pin
SO16, TSSOP16
1
2
3
4
5
6
7
9
10
11
12
8
13
14
15
16
HVQFN16
15
16
1
2
3
4
5
7
8
9
10
6[1]
11
12
13
14
Description
address lines (internal pull-up)
quasi-bidirectional I/O pins
supply ground
active LOW write control pin
I2C-bus serial clock
I2C-bus serial data
supply voltage
[1] HVQFN16 package supply ground is connected to both VSS pin and exposed center pad. VSS pin must be
connected to supply ground for proper device operation. For enhanced thermal, electrical, and board level
performance, the exposed pad needs to be soldered to the board using a corresponding thermal pad on the
board and for proper heat conduction through the board, thermal vias need to be incorporated in the
printed-circuit board in the thermal pad region.
PCA9500_4
Product data sheet
Rev. 04 — 15 April 2009
© NXP B.V. 2009. All rights reserved.
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